Stefano Chinnici

An EM-based phase-noise estimator for MIMO systems

In this paper, we derive a phase-noise estimator for MIMO systems affected by independent phase noise at each antenna. The proposed phase-noise estimator employs the expectation-maximization algorithm and can incorporate channel decoding. The main feature of the proposed estimator lies in the fact that it estimates separately phase-noise samples at the transmitter and at the receiver, instead of estimating, as it is typical in single-antenna case, the sum of the samples at the two sides. Simulation results show that the proposed estimator allows obtaining a very good performance at an affordable complexity.

Fast simulation of turbo codes on GPUs

Simulation of turbo codes with moderately long block lengths down to bit error rates of the order of 10-9 requires long runtimes on conventional CPUs. The approach described in this paper is based on a CPU/GPU co-processing strategy which aims at effectively distributing the processing tasks between the two platforms. In this paper, the most computationally intensive parts of turbo codes simulation are analyzed and their implementation on the GPU parallel architecture is discussed. Results on a case study for a serial concatenated convolutional code are presented, showing a simulation speed-up in excess of 10×. These initial results show that the CPU/GPU approach is a powerful tool that allows the characterization of the high SNR behavior of turbo codes with a short simulation runtime.

Channel coding and carrier recovery for adaptive modulation microwave radio links

This paper deals with channel coding and carrier recovery design for high-speed adaptive modulation microwave radio transmission sytems. The challenges posed by the microwave channel are discussed and the design trade-offs are analyzed. The proposed flexible adaptive modulation solution employs M-QAM modulations from 4 QAM up to 512 QAM and a high rate LDPC code. The code-rate flexible LDPC code performs within 1 dB away from the pragmatic capacity in AWGN channel. Particular attention is paid to the design of the carrier synchronization algorithm working at the low SNR conditions imposed by the code and the relatively poor local oscillator behavior.

High order M-QAM transceiver for gigabit radio microwave transmission: FPGA test chipset and ASIC design

This paper describes the system and architecture design of a transceiver for transmission of data rates up to 1 Gb/s over the microwave radio channel. The transceiver implements adaptive modulation using high-order QAM constellations, includes a powerful LDPC error correction code which offers high coding gain and low error floor in addition to a more traditional Reed-Solomon based solution. To minimize the impact of the phase noise due to low cost oscillators an advanced carrier recovery scheme is used. The design choices and trade-offs involved in implementing the transceiver in different technologies, an FPGA based test chipset and two different structured ASIC technologies, are described in details. Implementation of the transceiver in a standard cell ASIC is ongoing.

Design and implementation of an adaptive coding and modulation system for microwave radio transmission in mobile backhaul networks

The design of an adaptive coding and modulation (ACM) system for microwave radio transmission in mobile backhaul networks must comply with a number of application related constraints. The system gain should be maximized within the block length limits imposed by the maximum admissible transmission delay. The microwave channel characteristics require that the ACM system possess a high flexibility in terms of code rates and modulation alphabet. This paper describes the industrial application of a pragmatic ACM system, starting from system design down to architectural design and implementation in FPGA and ASIC technologies. The performance of the implemented scheme is compared against traditional codes in simulations and in a real-time radio link FPGA-based prototype.

High rate puncturing of LDPC codes

High-rate LDPC codes are increasingly used in transmission systems. Puncturing is a common scheme which produces a code with higher code rate starting from a base code with lower rate. This paper discusses a new method to derive a puncturing pattern, given the parity matrix of the base code. The method allows the extraction of a puncturing pattern which is optimized in terms of error floor performance and satisfies some constraints which results in a significant reduction of HW complexity with respect to other solutions. Simulation and HW measurements results on a punctured 19/20 code derived from a rate 15/16 LDPC code are reported.

Design of a flexible low-power modem chip for point to point radio link cellular backhaul applications

In the past few years, mobile networks have been offering higher data rates services, with the introduction of GSM-GPRS and the roll-out of 3G systems. As a consequence of this growth, increased flexibility and capacity has been required in the cellular backhaul network The flexible low-power modem chip presented here is a main building block of a new family of channel coding and constellation agile spectrum-efficient radio links. The design has been implemented on 130 nm ASIC technology.