Sten Vollebregt

Integrating low temperature aligned carbon nanotubes as vertical interconnects in Si technology

For the application of carbon nanotubes (CNT) as interconnects in integrated circuits low temperature vertically aligned growth with a high tube density is required. We found that etching and cleaning steps used in semiconductor technology can damage the catalyst or support layer, preventing low temperature aligned CNT growth. We propose to use a lift-off process and sacrificial layer to prevent damage. Using this method we created low temperature electrical measurement structures for CNT bundles. The bundles grown at 500 °C display a low resistivity and good Ohmic contact. Finally, we demonstrate that CNT can be covered by PECVD silicon oxide and nitride without inducing damage, which is of interest for low temperature bottom-up integration.

Size-Dependent Effects on the Temperature Coefficient of Resistance of Carbon Nanotube Vias

Carbon nanotube (CNT) vias were fabricated at 500 °C with different widths and lengths. The electrical resistance of the CNT vias was measured using four-point probe structures at temperatures between 25 °C and 190 °C. It was found that the temperature coefficient of resistance (TCR) of the CNT vias changes with both length and width. Most of the vias displayed a negative TCR between -300 and -400 ppm/K, against 3900 ppm/K for Cu, but for wider and shorter vias, this value becomes positive. A simple model is introduced, which can explain the length-dependent behavior.

Stretchable Binary Fresnel Lens for Focus Tuning

This paper presents a tuneable binary amplitude Fresnel lens produced by wafer-level microfabrication. The Fresnel lens is fabricated by encapsulating lithographically defined vertically aligned carbon nanotube (CNT) bundles inside a polydimethyl-siloxane (PDMS) layer. The composite lens material combines the excellent optical absorption properties of the CNT with the transparency and stretchability of the PDMS. By stretching the elastomeric composite in radial direction, the lens focal length is tuned. Good focusing response is demonstrated and a large focus change (≥24%) was achieved by stretching lenses up to 11.4%.

Impact of the atomic layer deposition precursors diffusion on solid-state carbon nanotube based supercapacitors performances

A study on the impact of atomic layer deposition (ALD) precursors diffusion on the performance of solid-state miniaturized nanostructure capacitor array is presented. Three-dimensional nanostructured capacitor array based on double conformal coating of multiwalled carbon nanotubes (MWCNTs) bundles is realized using ALD to deposit Al2O3 as dielectric layer and TiN as high aspect-ratio conformal counter-electrode on 2 μm long MWCNT bundles. The devices have a small footprint (from 100 μm(2) to 2500 μm(2)) and are realized using an IC wafer-scale manufacturing process with high reproducibility (≤0.3E-12F deviation). To evaluate the enhancement of the electrode surface, the measured capacitance values are compared to a lumped circuital model. The observed discrepancies are explained with a partial coating of the CNT, that determine a limited use of the available electrode surface area. To analyze the CNT coating effectiveness, the ALD precursors diffusions inside the CNT bundle is studied using a Knudsen diffusion mechanism.

Electrical characterization of carbon nanotube vertical interconnects with different lengths and widths

Carbon nanotubes (CNT) can be an attractive candidate for vertical interconnects due to their bottom-up nature and excellent electrical and thermal properties. In this paper we demonstrate low temperature high-density CNT growth and results of electrical characterization. We determined that our CNT contact resistance is low compared to other results in literature, likely caused by a good top contact. The CNT display good uniformity over the wafer and the calculated resistivity of 10 mΩ-cm is among the lowest in literature.

Towards the Integration of Carbon Nanotubes as Vias in Monolithic Three-Dimensional Integrated Circuits

Carbon nanotubes (CNT) can be an attractive candidate for vertical interconnects (vias) in three-dimensional integrated circuits due to their excellent thermal and electrical properties. To investigate the electrical resistivity of CNT, test vias were fabricated using both a top-down and bottom-up approach. The measured resistivity for the top-down process of 10 mΩ cm is among the better values found in literature. Beside this, the ability to grow CNT directly on single-grain thin-film transistors (SG-TFT) was demonstrated. The electrical performance of the SG-TFT was found not to be influenced by the CNT growth.

Thermal conductivity of low temperature grown vertical carbon nanotube bundles measured using the three-ω method

The thermal conductivity of as-grown vertical multi-walled carbon nanotubes (CNT) bundles fabricated at low temperature (500 °C) was measured using a vertical 3ω-method. For this, CNT were selectively grown inside an oxide opening and sandwiched between two metal electrodes. The validity of the method was confirmed by both measurements as simulations. The measured thermal conductivity of 1.7-3.5 W/mK is significantly lower than values reported before, which is caused by the low quality of the tubes. This clearly indicates that tube quality will be essential when integrating CNT.

Low-temperature bottom-up integration of carbon nanotubes for vertical interconnects in monolithic 3D integrated circuits

Carbon nanotubes (CNT) can be an attractive candidate for vertical interconnects in 3D monolithic integration, due to their excellent thermal and electrical properties. In this paper we investigate the use of a true bottom-up approach to fabricate CNT vias, for application in 3D monolithic integration. This circumvents metal deposition in high aspect ratio holes, and also allows the use of bundle densification techniques to increase CNT density. Using this approach we fabricated four-point probe electrical measurement structures for both as-grown and densified CNT bundles, and performed I-V measurements. The resulting I-V curves display non-linearities due to a non-Ohmic top contact. The measured resistivities of 10-20 mΩ-cm are among the better values found in literature.

CNT bundles growth on microhotplates for direct measurement of their thermal properties

Vertically aligned Carbon Nanotubes (CNT) arrays were successfully grown on top of a freestanding microhotplate, to investigate the thermal dissipation properties of CNT bundles and their applicability as heat exchanger. Two CNT configurations are employed: a group of six bundles, each with a diameter of 20 μm, and a single CNT bundle with a diameter of 200 μm. In both configurations the bundles are 70 μm high. The microhotplate consists of a platinum thin film microheater integrated on a freestanding silicon nitride membrane. The microhotplate is used as heat source and as temperature sensor. Results show that at 300 °C, 20% and 31% of power can be saved with the circular six and single bundle configurations, respectively.

Contact resistance of low-temperature carbon nanotube vertical interconnects

The electrical contact resistance and length dependant resistance of vertically aligned carbon nanotubes (CNT) grown at 500 °C with high tube density (1011 cm-2) are investigated by measuring samples with different CNT lengths. Cross-sectional imaging revealed that the CNT tips are well embedded over a length of several hundred nm. The determined contact resistance of 18 kΩ is low, which is attributed to a combination of CNT tip embedding and tip growth mechanism. When the CNT mean free path determined by Raman spectroscopy is compared with that obtained from the electrical measurements, it shows that multiple walls are conducting in parallel per CNT.