Stephen D. Glaser | Researchain

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Publication

Featured researches published by Stephen D. Glaser.

Archive | 2009

Iommu using two-level address translation for i/o and computation offload devices on a peripheral interconnect

Andrew G. Kegel; Mark D. Hummel; Stephen D. Glaser

Archive | 2010

CUSTOM ATOMICS USING AN OFF-CHIP SPECIAL PURPOSE PROCESSOR

Benjamin C. Serebrin; Stephen D. Glaser

Archive | 2013

TUNNEL SUITABLE FOR MULTI-SEGMENT COMMUNICATION LINKS AND METHOD THEREFOR

Stephen D. Glaser

Archive | 2012

WIRELESS COMMUNICATION FOR POINT-TO-POINT SERIAL LINK PROTOCOL

Stephen D. Glaser

Archive | 2011

Methods and apparatus for injecting pci express traffic into host cache memory using a bit mask in the transaction layer steering tag

Stephen D. Glaser; Mark D. Hummel

Archive | 2013

BUS AGENT CAPABLE OF SUPPORTING EXTENDED ATOMIC OPERATIONS AND METHOD THEREFOR

Stephen D. Glaser

Archive | 2011

I/O MEMORY TRANSLATION UNIT WITH SUPPORT FOR LEGACY DEVICES

Andrew G. Kegel; Stephen D. Glaser

Archive | 2010

METHOD AND APPARATUS FOR USING MULTIPLE PROTOCOLS ON A COMMUNICATION LINK

Stephen D. Glaser

Archive | 2011

METHODS AND APPARATUS FOR IMPLEMENTING PCI EXPRESS LIGHTWEIGHT NOTIFICATION PROTOCOLS IN A CPU/MEMORY COMPLEX

Stephen D. Glaser; Mark D. Hummel

Archive | 2011

SECURE AND VIRTUALIZABLE PERFORMANCE COUNTERS

Andrew G. Kegel; Stephen D. Glaser

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Collaboration

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Top Co-Authors

Andrew G. Kegel

Advanced Micro Devices

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Top Co-Authors

Mark D. Hummel

Advanced Micro Devices

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Top Co-Authors

Benjamin C. Serebrin

Advanced Micro Devices

View shared research outputs

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Archive Network Publication Hotspot Collaboration

Network

Latest external collaboration on country level. Dive into details by clicking on the dots.

Hotspot

Dive into the research topics where Stephen D. Glaser is active.

Publication

Featured researches published by Stephen D. Glaser.

Iommu using two-level address translation for i/o and computation offload devices on a peripheral interconnect

CUSTOM ATOMICS USING AN OFF-CHIP SPECIAL PURPOSE PROCESSOR

TUNNEL SUITABLE FOR MULTI-SEGMENT COMMUNICATION LINKS AND METHOD THEREFOR

WIRELESS COMMUNICATION FOR POINT-TO-POINT SERIAL LINK PROTOCOL

Methods and apparatus for injecting pci express traffic into host cache memory using a bit mask in the transaction layer steering tag

BUS AGENT CAPABLE OF SUPPORTING EXTENDED ATOMIC OPERATIONS AND METHOD THEREFOR

I/O MEMORY TRANSLATION UNIT WITH SUPPORT FOR LEGACY DEVICES

METHOD AND APPARATUS FOR USING MULTIPLE PROTOCOLS ON A COMMUNICATION LINK

METHODS AND APPARATUS FOR IMPLEMENTING PCI EXPRESS LIGHTWEIGHT NOTIFICATION PROTOCOLS IN A CPU/MEMORY COMPLEX

SECURE AND VIRTUALIZABLE PERFORMANCE COUNTERS

Collaboration

Dive into the Stephen D. Glaser's collaboration.