Stephen Visser

Reconfigurable FPGAS for real time image processing in space

Programmable logic offers an efficient solution for the performance and flexibility required by real time image processing systems. Application specific integrated circuit (ASIC) devices could provide such performance, but the lack of flexibility for changing operation requirements and the associated high development and production cost limit their acceptance for space applications. Field programmable gate arrays (FPGAs) offer highly flexible designs, scalable circuits, and real time system performance. The parallel processing power of FPGAs allows data to be processed more quickly than a similar microprocessor implementation. The High Performance Computing (HPC-I) payload for the Australian scientific mission satellite FedSat has been designed and manufactured to validate the use of FPGA technology onboard satellites for a variety of space applications. This paper elaborates on implementing image processing algorithms and techniques on FPGAs for space applications. It presents the implementation, testing and performance evaluation of a Gaussian filter and convolution engine on HPC-I.

FPGA-based cloud detection for real-time onboard remote sensing

Reconfigurable computing is an enabling technology for real-time image processing onboard remote sensing satellites. This can potentially reduce the delay between image capture, analysis and action, and also reduce onboard storage and downlink capacity requirements. This paper discusses the design and implementation of a real-time cloud detection system intended for use within an onboard remote sensing platform. The High Performance Computing (HPC-1) payload, designed and developed for the Australian scientific satellite FedSat, is briefly introduced as a demonstration of onboard processing in space using reconfigurable logic. A high level conceptual design of the proposed remote sensing system is provided, before details of the cloud detection design and implementation are presented. Results from simulation and testing demonstrate very promising performance in terms of data throughput and detection capabilities.

On-board satellite image compression using reconfigurable FPGAs

Remote sensing satellites operate almost exclusively in a store-and-forward mode, with acquired imagery stored on board until being downlinked when ground stations come within view. Space-borne imaging sensors generate tremendous volumes of data at very high rates, however storage capacity and communication bandwidth are expensive satellite resources. By compressing the images as they are acquired, better use is made of available storage and bandwidth capacity. Reconfigurable computing technology, which combines the flexibility of traditional microprocessors with the performance of ASIC devices, is very promising for space applications. The High Performance Computing (HPC-I) payload, based on a radiation hardened reconfigurable FPGA has been developed and integrated into the Australian scientific mission satellite FedSat. HPC-I is a testbed in space to validate reconfigurable logic for a variety of satellite applications. The design and implementation on HPC-I of the On-Board Image Compression System (OBICS) is presented, and its compression performance evaluated using JPEG standard as a benchmark. The results indicate that FPGAs and HPC-I are suitable platforms for such systems, and that satisfactory compression can only be achieved with moderately complex logic designs.

FPGA based real-time adaptive filtering for space applications

Satellites and other space-based signal processing systems face a challenging operating environment. In addition to radiation related effects, the satellites themselves are often electrically noisy, resulting in high levels of noise and interference in data signals. Digital signal processing systems such as adaptive filters are vital components for the next generation of satellites. Most current satellite systems have limited computing resources for on-board digital signal processing and lack flexibility to adapt to changing operation requirements. The deployment of reconfigurable field programmable gate array (FPGA) technology on-board satellites is a very promising solution for digital signal processing in space, as they offer flexibility, scalability and high performance. The high performance computing (HPC-I) payload integrated into the Australian scientific mission satellite FedSat is designed to evaluate the deployment of FPGA technology for a variety of space applications. This paper elaborates on implementing rule-based adaptive filtering techniques on FPGAs for space applications, presenting the design and implementation of an adaptive finite impulse response (FIR) filter on HPC-I. A fuzzy adaptive image filtering algorithm for remote sensing applications is also considered.

HEO satellite constellation for providing broadband services

There has been tremendous growth in overall demand for broadband telecommunication services driven by the Internet, multimedia communications, and business requirements in both urban and rural communities. Existing telecommunication networks have limited capacity and bandwidth. Satellite based broadband services (SBBS) is a promising solution. Satellites provide wide coverage with broadcasting and multicasting capabilities away from any domestic or global traffic. A proper combination of satellite and fiber optic networks provides the most powerful system for current and future market demands including broadband multimedia services for corporate, governmental, medical, and educational applications. This paper explores the required infrastructure and system level design for the SBBS with a focus on the space segment, network control segment, and the ground segment. It elaborates on a highly elliptical orbit (HEO) satellite constellation with enhanced redundancy and coverage as the backbone network in space. This network, in conjunction with the terrestrial fiber optic networks, provides efficient broadband multimedia services. The proposed system utilises smart satellites with onboard routing, switching and processing capacity enabled by reconfigurable computing technology. Modeling and simulation results for different feasible scenarios for the proposed constellation are presented. The paper also explores optical inter-satellite links between the satellites in the constellation to enable laser bi-directional communication for the network nodes in space.

Flexible real time signal filtering in space using reconfigurable logic

The High Performance Computing (HPC-I) payload is an innovative computing device designed for deployment on the Australian scientific mission satellite FedSat. HPC-I will validate and evaluate the practicality of using reconfigurable field programmable gate array (FPGA) technology in the space environment. The deployment of reconfigurable FPGA technology on-board satellites is a very promising solution for digital signal processing in the challenging space environment, offering tremendous flexibility to adapt to changing operation requirements, while achieving very high performance. Such combined flexibility and performance is not found in conventional signal processing architectures. This paper presents the design and implementation on HPC-I of two common digital signal filtering algorithms, a 4-tap low pass FIR filter and a 32-tap moving average filter. The flexibility and adaptability of the system is discussed in the context of more complex functionality and changing operation requirements.