Steven M. Guertin

In-flight observations of multiple-bit upset in DRAMs

In interplanetary space, the Cassini solid-state recorder is experiencing the predicted number of upsets, but a very high rate of uncorrectable errors. An experimental investigation of the flight DRAMs susceptibility to multiple-bit upset (MBU) proved enlightening, revealing an unexpectedly high rate of MBUs (even caused by protons). In combination with an architectural flaw in the error correction circuitry, these explain the flight anomaly.

Analysis of radiation effects on individual DRAM cells

A novel way to measure the radiation characteristics of DRAM memory cells is presented. Radiation exposure tends to drive retention times lower for cells. The change in retention time (the time period required for a cell to upset without refreshing) is used to measure the effect of irradiation on the DRAM cells. Both the radiation response of a single DRAM cell and the response of all cells as a statistical whole are analyzed.

Ion-induced stuck bits in 1T/1C SDRAM cells

Radiation exposure of certain types of devices tends to stick bits, causing them to not be read out correctly after programming. Evidence of a linear trend in stuck bits in SDRAM memory cells is presented. This trend makes a cross section, as traditionally defined for single-event effects, unambiguous. However, there are considerable part-to-part variations in the cross section.

A Dual Mode Redundant Approach for Microprocessor Soft Error Hardness

A dual mode redundant (DMR) logic data path with instruction restart that detects errors at register file (RF) write-back is presented. The DMR RF allows SEU correction using parity to detect RF entry nibbles that are correct in one copy but not the other. Detection and backing out incorrect write data are also described. The radiation hardened by design (RHBD) circuits are implemented in 90 nm CMOS. The DMR microarchitecture is described, including pipelining, error handling, and the associated hardware. Heavy ion and proton testing validate the approach. Experimentally measured cross sections and examples of errors due to pipeline SET or RF SEU are shown. Critical node spacing and the mitigation of multiple node collection are also described.

Radiation Tests on 2Gb NAND Flash Memories

We report on SEE and TID tests of highly scaled Samsung 2Gbits flash memories. Both in-situ and biased interval irradiations were used to characterize the response of the total accumulated dose failures. The radiation-induced failures can be categorized as followings: single event upset (SEU) read errors in biased and unbiased modes, write errors, and single-event-functional-interrupt (SEFI) failures

LEON 3FT Processor Radiation Effects Data

Special SEU test software is used to monitor the single-bit per word corrected errors in the internal SRAM of the LEON 3 fault tolerant processor. SEL and TID results are discussed.

Investigation of the Mechanism of Stuck Bits in High Capacity SDRAMs

The phenomenon of stuck bits in SDRAMs is studied. Previous work demonstrated this effect is linear with fluence, and is due to reduction in retention time of stuck cells. Particular emphasis is placed on variations in cell structure that affect sensitivity. The exact mechanism of a stuck bit is predicted.

SEL Induced Latent Damage, Testing, and Evaluation

We describe a methodology for evaluating and screening SEL susceptible devices for latent damage. Experimental data and modeling are presented to demonstrate the approach on actual devices

Compendium of current single event effects results from NASA goddard space flight center and NASA electronic parts and packaging program

We present the results of single event effects (SEE) testing and analysis investigating the effects of radiation on electronics. This paper is a summary of test results.

Total Ionizing Dose Response of SDRAM, DDR2 and DDR3 Memories

Total Ionizing Dose response of SDRAM, DDR2 and DDR3 memories is reported in static bias, and auto refresh modes. Data analysis reveals some types of memory have significant increases in stuck bits during TID exposure when refreshed.