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Featured researches published by Steven Robert Hetzler.


IEEE Transactions on Information Theory | 2013

Partial-MDS Codes and Their Application to RAID Type of Architectures

Mario Blaum; James Lee Hafner; Steven Robert Hetzler

A family of codes with a natural 2-D structure is presented, inspired by an application of redundant arrays of independent disks (RAID) type of architectures whose units are solid-state drives (SSDs). Arrays of SSDs behave differently from arrays of hard disk drives, since hard errors in sectors are common and traditional RAID approaches (like RAID 5 or RAID 6) may be either insufficient or excessive. An efficient solution to this problem is given by the new codes presented, called partial maximum distance separable (PMDS) codes.


IEEE Transactions on Magnetics | 2012

Technology Roadmap Comparisons for TAPE, HDD, and NAND Flash: Implications for Data Storage Applications

Robert E. Fontana; Steven Robert Hetzler; Gary M. Decad

This paper describes the roadmap goals for tape based magnetic recording (TAPE) and uses these goals as counterpoints for the roadmap strategies for hard disk drive (HDD) and NAND flash. Technology comparisons described in this paper will show that presently volumetric efficiencies for TAPE, HDD, and NAND are similar, that lithographic requirements for TAPE are less challenging than those for NAND and HDD, and that mechanical challenges (moving media and transducer to media separation) for TAPE and HDD are potential limiters for roadmap progress and are non-existent for NAND. One result of the technology comparison discussion will be that the potential for sustained annual areal density increase rates, i.e. extendibility, for TAPE, is significantly greater than that for NAND and HDD due to the present TAPE bit cell area being a factor of 200-300 larger than the NAND and HDD bit cell area. More critically, the roadmap landscape for TAPE is limited by neither thin film processing (i.e., nanoscale dimensions) nor bit cell thermal stability. In contrast, NAND volumetric density faces limitations in extending critical feature processing, now at 25 nm, and HDD volumetric density faces challenges in transitioning either to patterned media with critical feature processing well below 15 nm or to heat assisted magnetic recording (HAMR) with the introduction of laser components to the data write process.


ieee conference on mass storage systems and technologies | 2013

The impact of areal density and millions of square inches (MSI) of produced memory on petabyte shipments of TAPE, NAND flash, and HDD storage class memories

Robert E. Fontana; Gary M. Decad; Steven Robert Hetzler

Increases in annual petabyte (PB) shipments for storage class memories (SCM) are driven by both increases in areal density and increases in manufacturing capacity. Increases in areal density tend to reduce cost per bit while increases in manufacturing capacity are cost neutral or slightly increase cost per bit. This paper surveys the last five years of PB shipments, areal density, revenue, and cost per bit for magnetic tape (TAPE), hard disk drives (HDD), and NAND flash to study manufacturing and cost trends for storage class memories. First, using the five year data for PB shipments and areal density values for TAPE, HDD and NAND flash, this paper applies a manufacturing measure used by semiconductors, millions of square inches or MSI of produced memory, to TAPE, HDD, and NAND flash in order to compare manufacturing requirements for these three SCM technologies. The MSI calculations shows for HDD and NAND, with slowing areal density increases, that manufacturing investments will be required for sustaining PB shipment growth while for TAPE modest investment in manufacturing capacity is required. The MSI calculations also show that the cost of NAND replacing HDD is prohibitive based simply on present day manufacturing capacity and show that for HDD to adopt processing requirements for patterned media, the next proposed areal density improvement for HDD, would require significant manufacturing investments. Second, using the five year data for PB shipments and revenue for TAPE, HDD, and NAND flash, trends in cost per bit for the SCM technologies can be determined and related to both technology innovations, i.e. lithography for NAND flash and predictable areal density increases for TAPE, and to external market factors, i.e. industry consolidation for HDD and mobile computing for NAND flash. Lastly, while 2012 PB shipments for TAPE, HDD, and NAND flash totaled 430,000 PB, dominated by HDD with 380,000 PB, perceived information creation in 2012 was over 1,300,000 PB, posing the question to SCM manufacturers as to how information is stored in todays environment.


IEEE Transactions on Magnetics | 2008

Thin-Film Processing Realities for

Robert E. Fontana; N. Robertson; Steven Robert Hetzler

Magnetic recording has maintained a cost/bit advantage over solid-state storage by using a single transducer to self-assemble bits with sub-lithographic dimensions on an unpatterned substrate. This paper explores the ability of magnetic recording to maintain this advantage at 1 Tbit/in2 by examining the process challenges associated with the fabrication of head structures at this areal density. Specifically, this paper describes the minimum feature, F, and alignment requirements for the thin-film head structures supporting 1 Tbit/in2 densities and compares these requirements with the projected roadmaps of the semiconductor industry. These comparisons indicate that minimum feature head processing requirements will match semiconductor capabilities in the time frame for 1 Tbit/in2 recording product. Further, alignment requirements for the head structure will exceed projected semiconductor capabilities in this same time frame. The process implications of the technologies of discrete tracks and patterned bits are analyzed, which move the minimum feature requirements from the head structure to the disk media. These approaches require patterning sub-lithographic bit cell dimensions which by definition exceed semiconductor lithographic capabilities.


International Journal of Information and Coding Theory | 2016

{\hbox{Tbit/in}}^{2}

Mario Blaum; Steven Robert Hetzler

Considerable interest has been paid in recent literature to codes combining local and global properties for erasure correction. Applications are in cloud type of implementations, in which fast recovery of a failed storage device is important, but additional protection is required in order to avoid data loss, and in RAID type of architectures, in which total device failures coexist with silent failures at the page or sector level in each device. Existing solutions to these problems require in general relatively large finite fields. The techniques of integrated interleaved codes which are closely related to generalised concatenated codes are proposed to reduce significantly the size of the finite field, and it is shown that when the parameters of these codes are judiciously chosen, they outperform codes optimising the minimum distance with respect to the average number of erasures that the code can correct.


IEEE Transactions on Information Theory | 2018

Recording

Mario Blaum; Steven Robert Hetzler

A new class of codes, Extended Product (EPC) Codes, consisting of a product code with a number of extra parities added, is presented and applications for erasure decoding are discussed. An upper bound on the minimum distance of EPC codes is given, as well as constructions meeting the bound for some relevant cases. A special case of EPC codes, Extended Integrated Interleaved (EII) codes, which naturally unify Integrated Interleaved (II) codes and product codes, is defined and studied in detail. It is shown that EII codes often improve the minimum distance of II codes with the same rate, and they enhance the decoding algorithm by allowing decoding on columns as well as on rows. It is also shown that EII codes allow for encoding II codes with an uniform distribution of the parity symbols.


ieee international magnetics conference | 2006

Integrated interleaved codes as locally recoverable codes: properties and performance

Robert E. Fontana; Thomas R. Albrecht; Steven Robert Hetzler

This paper approaches future areal density estimation for storage (tape, disk, and NAND flash) using processing and in particular minimum feature roadmaps. And discusses the process implications faced by recording storage for achieving these projections especially in the 2010 time period when disk areal densities are projected at 500 Gbit/in2, when disk drive minimum features converge with NAND flash features projected at 35 nm, and when a transition from continuous to patterned media may occur. The annual increases in IC memory density set the areal density increases that disk drives must achieve to maintain present day cost per bit ratios with solid state memory applications. Second, patterned media requires the formation of read and write sensors with dimensions that coincide with NAND flash dimensions. In sum, novel and cost effective minimum feature processing must be anticipated in order to sustain areal density growth for magnetic recording.


Archive | 1993

Extended Product and Integrated Interleaved Codes

Steven Robert Hetzler; William John Kabelac


Archive | 1997

A processing perspective for areal density projections for tape storage, disk drive storage, and flash memory

Steven Robert Hetzler


Archive | 1995

Sector architecture for fixed block disk drive

Steven Robert Hetzler

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