Suayb S. Arslan

Redundancy and Aging of Efficient Multidimensional MDS Parity-Protected Distributed Storage Systems

The effect of redundancy on the aging of an efficient maximum distance separable (MDS) parity-protected distributed storage system that consists of MDS-parity protected array of storage units is explored. In light of the experimental evidences and survey data, this paper develops generalized expressions for the reliability of array storage systems based on more realistic time to failure distributions such as Weibull. For instance, a distributed disk array system is considered in which the array components are disseminated across the network and are subject to independent failure rates. Based on such, generalized closed-form hazard rate expressions are derived. These expressions are extended to estimate the asymptotical reliability behavior of large-scale storage networks equipped with MDS parity-based protection. Unlike previous studies, a generic hazard rate function is assumed, a generic MDS code for parity generation is used, and an evaluation of the implications of adjustable redundancy level for an efficient distributed storage system is presented. Results of this paper are applicable to any erasure correction code as long as it is accompanied with a suitable structure and an appropriate encoding/decoding algorithm such that the MDS property is maintained.

MDS Product Code Performance Estimations Under Header CRC Check Failures and Missing Syncs

Data storage systems that use removable media heavily rely on strong concatenated error correction coding (ECC) architectures in order to guarantee very low target data loss rates. Particularly, tape drives and optical disk drives (e.g., CD, DVD, and BD) employ powerful ECC schemes based on a concatenation of an outer maximum distance separable (MDS) code called C2 and an inner MDS code called C1 in order to achieve this performance. In addition to data, these storage systems employ header and synchronization appends (i.e., sync patterns) for appropriate allocation of user information on the physical storage medium. Since headers and sync patterns are subject to channel errors as well, accurately retrieved data may be regarded useless if an error occurs in either of these fields. In order to predict very low target C2 failure rates (which is typically on the order of 10-17) in the presence of header and synchronization errors, we propose a semianalytical method in this paper that incorporates the effects of the header and synchronization errors in the output error rate expressions. We use our proposed model with linear tape open (LTO) data examples to both show the effectiveness of the estimation results and draw some interesting conclusions.

Error Event Corrections Using List-NPML Decoding and Error Detection Codes

A List-Noise Predictive Maximum Likelihood (List-NPML) decoding algorithm based on a periodic error detection mechanism is proposed for magnetic recording systems to minimize the number of error events. The proposed detector keeps a list of candidate paths ( candidates per state of a trellis) based on the observation that most of the error events can be recovered by finding a set of most likely paths. A periodic decision making process is utilized for every bits based on error detection codes. With this approach, a tradeoff between performance and complexity is studied with various combinations of and . The proposed structure is robust to miscorrections and time-varying error events, eliminating the need for knowing the error event distributions prior to its operation. We also introduced a novel design of parity bits that meets the run length constraints of the channel and a trellis update architecture for improved performance. Simulation results show that the proposed List-NPMLD gives us significant BER performance and post-ECC gains at the expense of some increase in complexity.

Cycle Slip Detection and Correction Through Classification of Modulation Code Failures

In high-density recording systems, synchronization might be lost due to increased noise and/or inaccurate sampling/filtering. In such, long bursts of errors occur due to bits either erased from or inserted into the bit stream. At low signal-to-noise ratios, such bit slips (also known as cycle slips) lead to excessive post-error correction code (post-ECC) failures. In order to reduce the rate of the post-ECC failures, cycle slips should be detected and corrected. In the past, the majority of the research was concentrated on iterative joint timing recovery and error decoding methodologies. In this study, we propose to detect and correct cycle slips using a decoding failure analysis of maximum transition run (MTR) codeword sequences in conjunction with a general-purpose classification algorithm. First, noncyclic properties of constrained coding are identified by realizing that MTR codewords render invalid more often if bit shifts happen. Later, we present a method to use such invalid codewords to help detect and correct cycle slips. Finally, some numerical results are presented to show the effectiveness of the proposed detection/correction scheme using MTR codes and the support vector machines. It is demonstrated that such a combination has the potential for BER and post-ECC failure rate performance improvements by eliminating cycle slips for the generalized partial response channels.

Minimum distortion variance concatenated block codes for embedded source transmission

Some of the state-of-art multimedia source encoders produce embedded source bit streams that upon the reliable reception of only a fraction of the total bit stream, the decoder is able reconstruct the source up to a basic quality. Reliable reception of later source bits gradually improve the decoder reconstruction quality. Examples include scalable extensions of H.264/AVC and progressive image coders such as JPEG2000. To provide an efficient protection for embedded source bit streams, a concatenated block coding mechanism using a minimum mean distortion criterion was considered in the past. Although, the original design was shown to achieve mean distortion characteristics better than that of previous research, the proposed coding structure was leading to dramatic quality fluctuations. In this paper, a modification of the original design is first presented and then the second order statistics of the distortion is taken into account in the optimization. More specifically, an extension scheme is proposed using a minimum distortion variance optimization criterion. This robust system design is tested for an image transmission scenario. Numerical results show that the proposed extension achieves significantly lower variance than the original design, while showing similar mean distortion performance using both convolutional codes and low density parity check codes.

EMBEDDING NOISE PREDICTION INTO LIST-VITERBI DECODING USING ERROR DETECTION CODES FOR MAGNETIC TAPE SYSTEMS

A List Viterbi detector produces a rank ordered list of the N globally best candidates in a trellis search. A List Viterbi detector structure is proposed that incorporates the noise prediction with periodic state-metric updates based on outer error detection codes (EDCs). More specifically, a periodic decision making process is utilized for a non-overlapping sliding windows of P bits based on the use of outer EDCs. In a number of magnetic recording applications, Error Correction Coding (ECC) is adversely effected by the presence of long and dominant error events. Unlike the conventional post processing methods that are usually tailored to a specific set of dominant error events or the joint modulation code trellis architectures that are operating on larger state spaces at the expense of increased implementation complexity, the proposed detector does not use any a priori information about the error event distributions and operates at reduced state trellis. We present pre ECC bit error rate performance as well as the post ECC codeword failure rates of the proposed detector using perfect detection scenario as well as practical detection codes as the EDCs are not essential to the overall design. Furthermore, it is observed that proposed algorithm does not introduce new error events. Simulation results show that the proposed algorithm gives improved bit error and post ECC codeword failure rates at the expense of some increase in complexity.