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Dive into the research topics where Subayal Khan is active.

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Featured researches published by Subayal Khan.


international symposium on system-on-chip | 2010

From Y-chart to seamless integration of application design and performance simulation

Subayal Khan; Eila Ovaska; Kari Tiensyrjä; Jari Nurmi

Performance simulation techniques play a key role in the architectural exploration phase of embedded systems design. Modern mobile devices support diverse applications that are enabled by rapid increase of computational power of mobile platforms. A brisk performance evaluation phase is required after the application modelling to evaluate feasibility of new applications on a platform. To reduce the modeling effort in performance simulation and to reduce time to market, the Application modeling and performance simulation phases must be seamlessly integrated. The landmark techniques in this area are developed around some key concepts which we explain first. Then we investigate each landmark contribution and mention the way each one of them addresses, extends and/or employs these key concepts. After mentioning the related work done in this area, we elaborate the methodology and tools which could be used as a potential solution to achieve the goal of seamless integration of application design and performance simulation.


international symposium on system-on-chip | 2011

Analyzing transport and MAC layer in system-level performance simulation

Subayal Khan; Jukka Saastamoinen; Mikko Majanen; Jyrki Huusko; Jari Nurmi

The modern mobile embedded devices support complex distributed applications via heterogeneous multi-core platforms. For the successful deployment of these applications, the scalability and performance analysis must be performed at all the layers of OSI model. This helps to identify the potential bottlenecks at different layers to perform the necessary optimizations. To achieve this goal, a framework is needed which accurately models the functionalities at different layers. The technical contributions described in this article include the extensions of ABstract inStruction wOrkLoad & execUtion plaTform based performance simulation (ABSOLUT) for the performance and scalability analysis of Transport and Medium Access Control (MAC) layers in the system level performance simulation. The article elaborates the design accuracy of the modeled components and their application in the context of M3 (multi-device, multi-vendor, multi-domain), which is a tri-layered conceptual interoperability architecture for embedded devices. These extensions pave the way towards the full coverage of the OSI model in the system-level performance simulation of distributed embedded systems. The network simulators for example ns-2, OMNeT++ and OPNET though provide detailed models of transport and MAC protocols but do not provide any framework such that these models can be used by the application workload models to mimic the real world use-cases. Also these models do not model the execution workload of these protocols on a particular execution platform and hence cannot be used in the architectural exploration of distributed embedded systems.


ieee international conference on dependable, autonomic and secure computing | 2011

System Level Performance Simulation of Distributed GENESYS Applications on Multi-core Platforms

Subayal Khan; Jukka Saastamoinen; Kari Tiensyrjä; Jari Nurmi

Modern high end mobile devices employ multi-core platforms and support diverse distributed applications due to increased computational power. A brisk performance evaluation phase is required after the application modelling to evaluate feasibility of new distributed applications on the multi-core mobile platforms. GENESYS modelling methodology which employs service-oriented and component based distributed application design has been extended for this purpose such that application level services are refined to platform-level services allowing mapping of GENESYS application architecture to workload models used in performance evaluation. This results in easy extraction of application workload models, reducing the time and effort in the performance evaluation phase needed for architectural exploration. This article presents the way brisk performance evaluation of distributed GENESYS applications is achieved by employing extended GENESYS distributed application architecture. The approach is experimented with a case study. UML2.0 MARTE profile, Papyrus UML2.0 modelling tool and SystemC were used for modelling and simulation.


Journal of Systems Architecture | 2013

Early-phase performance exploration of embedded systems with ABSOLUT framework

Janne Vatjus-Anttila; Jari Kreku; Juha Korpi; Subayal Khan; Jukka Saastamoinen; Kari Tiensyrjä

Future interactive embedded systems will support a large number of applications providing users with services related to e.g. telecommunication, audio and video, digital television, internet and navigation. To accommodate these performance demanding applications, the digital processing architectures will evolve from current system-on-chips to massively parallel computers consisting of heterogeneous subsystems connected by a network-on-chip. More flexibility, scalability and modularity are needed from the embedded devices. Consequently, the complexity of system design will increase by orders of magnitude. New methods and tools are needed for the performance evaluation of future embedded systems due to the increasing system complexity. This paper presents a high-level performance modelling and simulation approach called ABSOLUT that alleviates exploration complexity by using abstract virtual system models. The characteristics of the applications are abstracted to workload models that at the bottom level consist of instruction-like primitives. The workload models can be created from application specifications, measurement results, execution traces or source code. The complexity of the execution platform models is reduced since the processing elements need not be modelled in detail and data transfers and storage are simulated only from the performance point of view. The approach enables early evaluation, since the modelling and simulation of complete systems does not require mature hardware or software to exist. ABSOLUT has been applied to a number of case studies including mobile phone usage, MP3 playback, MPEG4 encoding and decoding, 3D gaming, virtual network computing and parallel software defined radio applications. The platforms modelled are either existing or future designs for both embedded systems and personal computers. In several cases, the results obtained from simulations are compared to measurements from real platforms, which reveal an average difference of 12% in the results. This exceeds the accuracy requirements expected from virtual system based simulation approaches intended for early evaluation. In this paper, the most recent enhancements of the ABSOLUT methodology and tool framework are applied in a FFMPEG case study on OMAP4 platform model. The simulation results are compared with those obtained from the execution on an OMAP4-based PandaBoard.


digital systems design | 2010

Instantiating GENESYS Application Architecture Modeling via UML 2.0 Constructs and MARTE Profile

Subayal Khan; Kari Tiensyrjä; Jari Nurmi

Modeling of complex and computationally intense applications supported by modern mobile devices via standard modeling languages is a challenging task. Within the GENESYS process model the application modeling phase is thus of key importance. GENESYS manages complexity by employing cross domain and platform-based application design. The main contribution of this article is to describe the instantiation of GENESYS application architecture modeling via MARTE profile and describe a methodology for validation of nonfunctional properties annotated in the application model.


International Journal of Embedded and Real-time Communication Systems | 2013

Application Workload Modelling via Run-Time Performance Statistics

Jari Nurmi; Subayal Khan; Jukka Saastamoinen; Jyrki Huusko; Juha-Pekka Soininen

Modern mobile nomadic devices for example internet tablets and high end mobile phones support diverse distributed and stand-alone applications that were supported by single devices a decade back. Furthermore the complex heterogeneous platforms supporting these applications contain multi-core processors, hardware accelerators and IP cores and all these components can possibly be integrated into a single integrated circuit chip. The high complexity of both the platform and the applications makes the design space very complex due to the availability of several alternatives. Therefore the system designer must be able to quickly evaluate the performance of different application architectures and implementations on potential platforms. The most popular technique employed nowadays is termed as system-level-performance evaluation which uses abstract workload and platform capacity models. The platform capacity models and application workload models reside at a higher abstraction-level. The platform and application workload models can be instantiated with reduced modeling effort and also operate at a higher simulation speed. This article presents a novel run-time statistics based application workload model extraction and platform configuration technique. This technique is called platform COnfiguration and woRkload generatIoN via code instrumeNtation and performAnce counters CORINNA which offers several advantages over compiler based technique called ABSINTH, and also provides automatic configuration of the platform processor models for example cache-hits and misses obtained during the application execution.


arcs workshops | 2011

Multi-threading support for system-level performance simulation of multi-core architectures.

Jukka Saastamoinen; Subayal Khan; Kari Tiensyrjä; Tapio Taipale


forum on specification and design languages | 2009

Linking GENESYS application architecture modelling with platform performance simulation

Subayal Khan; Susanna Pantsar-Syväniemi; Jari Kreku; Kari Tiensyrjä; Juha-Pekka Soininen


Journal of Computational Chemistry | 2016

Universal Tracing Interface for Multicore Processors

Janne Vatjus-Anttila; Mika Hoppari; Lance Fono; Kari Kolehmainen; Subayal Khan


international conference on advances in system simulation | 2013

Estimating Energy Efficiency of Data-Link Layer in System Level Performance Evaluation

Subayal Khan; Jukka Saastamoinen; Jyrki Huusko; Juha Korpi; Jari Nurmi

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Jari Nurmi

Tampere University of Technology

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Jukka Saastamoinen

VTT Technical Research Centre of Finland

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Jyrki Huusko

VTT Technical Research Centre of Finland

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Kari Tiensyrjä

Royal Institute of Technology

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Juha Korpi

VTT Technical Research Centre of Finland

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Janne Vatjus-Anttila

VTT Technical Research Centre of Finland

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Jari Kreku

VTT Technical Research Centre of Finland

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Kari Tiensyrjä

Royal Institute of Technology

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Juha-Pekka Soininen

VTT Technical Research Centre of Finland

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Eila Ovaska

VTT Technical Research Centre of Finland

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