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Dive into the research topics where Sumio Terakawa is active.

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Featured researches published by Sumio Terakawa.


IEEE Transactions on Electron Devices | 2011

Submicrometer Ultralow-Power TFT With 1.8 nm NAOS

Yasushi Kubota; Taketoshi Matsumoto; Shigeki Imai; Mikihiro Yamada; Hiroshi Tsuji; Kenji Taniguchi; Sumio Terakawa; Hikaru Kobayashi

We have fabricated submicrometer ultralow-power thin-film transistors (TFTs) with stack gate dielectric structure formed by the nitric acid oxidation of Si (NAOS) method. A 1.8 nm NAOS SiO2 layer effectively blocks the leakage current, and consequently, the thickness of a gate oxide layer deposited on the NAOS SiO2 layer can be made as thin as 20 nm. Because of the thin gate oxide layer, submicrometer TFTs with gate length in the range of 0.6-0.9 μm can be fabricated. The operation voltage of the TFTs can be set as low as 1.5 V because of the low threshold voltages (i.e., -0.6 V for P-ch TFT and 0.6 V for N-ch TFT). The drain current versus source-drain voltage curves possess an ideal feature with sufficiently high saturation currents even at 1.5 V operation voltage. The drain current versus gate voltage curves show a sharp current increase, and the subthreshold swing value is ~80 mV/dec for both P-ch and N-ch TFTs. The on/off ratio is ~109 for both P-ch and N-ch TFTs, and the channel mobility is ~100 cm2/V·s for P-ch TFT and ~200 cm2/V·s for N-ch TFT.


IEEE Electron Device Letters | 2010

\hbox{SiO}_{2}/\hbox{20} \ \hbox{nm}

Taketoshi Matsumoto; Yasushi Kubota; Mikihiro Yamada; Hiroshi Tsuji; Takafumi Shimatani; Yasuhiro Hirayama; Sumio Terakawa; Shigeki Imai; Hikaru Kobayashi

We have fabricated a thin-film transistor (TFT) in which a gate oxide layer possesses a stack structure with an ultrathin interfacial SiO2 layer formed by the nitric acid oxidation of silicon (NAOS) method at room temperature and a 40 nm CVD SiO2 layer. The drain current-voltage characteristics show that TFT with NAOS interfacial layer can be operated at 3 V (the conventional operation voltage is 12-15 V), indicating that a vast decrease in TFT power consumption is possible. The threshold voltage becomes less than 1 V, and the short-channel effect can be avoided.


international electron devices meeting | 2010

CVD

Taketoshi Matsumoto; Mikihiro Yamada; Hiroshi Tsuji; Kenichi Taniguchi; Yasushi Kubota; Shigeki Imai; Sumio Terakawa; Hikaru Kobayashi

We have succeeded in fabrication of ultra-low power poly-Si based thin film transistors (TFTs) with 10 nm gate insulators and 1 V driving voltage. An ultrathin interfacial SiO<inf>2</inf> layer formed in 68 wt% nitric acid (HNO<inf>3</inf>) aqueous solutions at 120°C decreases a gate leakage current by two orders of magnitude, resulting in a high on/off ratio of 10<sup>9</sup>.


Central European Journal of Physics | 2010

\hbox{SiO}_{2}

Takashi Iwata; Taketoshi Matsumoto; Sumio Terakawa; Hikaru Kobayashi

A thick Al2O3/aluminum (Al) structure has been fabricated by oxidation of Al with 68wt% and 98wt% nitric acid (HNO3) aqueous solutions at room temperature. Measurements of the Al2O3 thickness vs. the oxidation time show that reaction and diffusion are the rate-determining steps for oxidation with 68wt% and 98wt% HNO3 solutions, respectively. Observation of transmission electron micrographs shows that the Al2O3 layer formed with 68wt% HNO3 has a structure with cylindrically shaped pores vertically aligned from the Al2O3 surface to the Al2O3/Al interface. Due to the porous structure, diffusion of HNO3 proceeds easily, resulting in the reaction-limited oxidation mechanism. In this case, the Al2O3/Al structure is considerably rough. The Al2O3 layer formed with 98wt% HNO3 solutions, on the other hand, possesses a denser structure without pores, and the Al2O3/Al interface is much smoother, but the thickness of the Al2O3 layer formed on crystalline Al regions is much smaller than that on amorphous Al regions. Due to the relatively uniform Al2O3 thickness, the leakage current density flowing through the Al2O3 layer formed with 68wt% HNO3 is lower than that formed with 98wt% HNO3.


Progress of Theoretical Physics | 1973

Gate Stack Structure

Toshijiro Tanaka; Sumio Terakawa; Sasuke Miyazima

The localized spin wave states in ferrimagnets with a single substituted impurity spin are investigated within the linear spin wave theory. The cases both of a ferromagnetically coupled impurity spin and of an antiferromagnetically coupled one are discussed. Numerical analysis is performed for the one-dimensional lattice, in which there exist two types of localized modes, s and p modes. We calculate the energies and spin deviation amplitudes of the localized spin wave modes. The criteria for the appearance of the localized modes are also examined. In particular we are interested in the localized mode in the energy gap between the acoustic and optical spin wave bands. There exist hole modes in the gap under a certain condition. It is found that the localized mode in the gap behaves differently from the modes in the other energy regions.


Archive | 2005

Ultralow-Power TFT With Gate Oxide Fabricated by Nitric Acid Oxidation Method

Osamu Asano; Hitoo Iwasa; Sumio Terakawa; Masami Shouji


Archive | 2005

Ultra-low power TFTs with 10 nm stacked gate insulator fabricated by nitric acid oxidation of Si (NAOS) method

Osamu Asano; Hitoo Iwasa; Sumio Terakawa; Masami Shouji


Applied Surface Science | 2008

Fabrication of Al2O3/Al structure by nitric acid oxidation at room temperature

Sung-Soon Im; Sumio Terakawa; Hitoo Iwasa; Hikaru Kobayashi


Microelectronic Engineering | 2009

Localized Spin Wave States in Ferrimagnets

Taketoshi Matsumoto; Asuha; Woo-Byoung Kim; Mikihiro Yamada; Shigeki Imai; Sumio Terakawa; Hikaru Kobayashi


Archive | 2007

Solid-Stated Image Pickup Device And Method For Manufacturing Same

Osamu Asano; Hitoo Iwasa; Masami Shouji; Sumio Terakawa

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Shigeki Imai

National Archives and Records Administration

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Yasushi Kubota

National Archives and Records Administration

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