Sumit Bagga

Codesign of an impulse generator and miniaturized antennas for IR-UWB

The codesign of an impulse generator and miniaturized antennas for ultra-wideband impulse radio is described. The impulse generator, discussed by Bragga in 2004, is designed with differential outputs that are fed to the antenna, producing an optimum match of the generator to the antenna, an improved magnitude response, and reduced ringing of the radiated pulse. The impulse generator is preceded by a programmable pulse-position modulator and consists of a triangular pulse generator and a cascade of complex first-order systems, which, in turn, are made up of differential pairs employing partial positive feedback to approximate a Gaussian monocycle waveform. The complete pulse generator is fabricated in IBM 0.18-/spl mu/m Bi-CMOS IC technology. Measurements show the correct operation of the circuit for supply voltages of 1.8 V and a power consumption of 45 mW. The output pulse approximates the Gaussian monocycle having a pulse duration of about 375 ps. Proper modulation of the pulse in time is confirmed. A number of antennas with differentially fed baluns and input impedances of 100 /spl Omega/ have been designed. From measurements, it can be seen that ringing is considerably smaller as compared to conventionally fed antennas.

A PPM Gaussian monocycle transmitter for ultra-wideband communications

A Gaussian pulse generator incorporating a pulse position modulator for use in an impulse radio ultrawideband system is described. The pulse generator is preceded by a programmable pulse position modulator and comprises a cascade of complex first-order systems, which, in turn, are made up of differential pairs employing partial positive feedback. The resulting PPM Gaussian pulse generator is designed in IBM 0.18 /spl mu/m Bi-CMOS IC technology. Simulations predict the correct operation of the circuit for supply voltages of 1.8 V and a power consumption of 30 mW. The output monocycle indeed approximates a Gaussian monocycle, having a pulse duration of about 250 ps. Proper modulation of the pulse in time is confirmed.

Log-domain wavelet bases

A novel procedure to approximate wavelet bases using analog circuitry is presented. First, an approximation is used to calculate the transfer function of the filter, whose impulse response is the required wavelet. Next, for low-power low-voltage applications, we optimize the state-space description of the filter for dynamic range, sensitivity and sparsity requirements. The filter design that follows is based on an orthonormal ladder structure with log-domain integrators as the main building blocks. Simulations demonstrate that it approximates the required wavelet base (i.e., Morlet) in an excellent way. The circuit operates from a 1.2-V supply voltage and a bias current of 1.2 /spl mu/A.

A quantized analog delay for an ir-UWB quadrature downconversion autocorrelation receiver

A quantized analog delay is designed as a requirement for the autocorrelation function in the quadrature downconversion autocorrelation receiver (QDAR). The quantized analog delay is comprised of a quantizer, multiple binary delay lines and an adder circuit. Being the foremost element, the quantizer consists of a series of comparators, each one comparing the input signal to a unique reference voltage. The comparator outputs connect to binary delay lines, which are a cascade of synchronized D-latches. The outputs available at each line are linked together to reconstruct the incoming signal using an adder circuit. For a delay time of 550 ps, simulation results in IBMs CMOS 0.12 /spl mu/m technology show that the quantized analog delay requires a total current of 36.7 mA at a 1.6 V power supply. Furthermore, delays in the range of several nanoseconds are feasible at the expense of power. After a Monte Carlo simulation it becomes evident that the response of the quantized analog delay does not suffer drastically from neither process nor component mismatch variations.

A quadrature downconversion autocorrelation receiver architecture for UWB

In this paper, a new UWB receiver architecture is proposed. Unlike a rake receiver, it does not suffer from the timing and template matching problems, and it circumvents processing at high frequencies, thereby reducing the on-chip circuit complexity and power consumption and offering simple but effective narrowband interference rejection. Simulations show that with current IC technology, the receiver only shows a slight, acceptable performance loss with respect to the ideal case.

A High Efficiency Orthogonally Switching Passive Charge Pump Rectifier for Energy Harvesters

The design and analytical modeling of a high efficiency energy harvester comprising a passive voltage-boosting network (VBN) and a switching charge pump rectifier (CPR) is presented in this paper. To improve the power conversion efficiency (PCE), the VBN increases the voltage at the input of the CPR and provides control signals for switching. Unlike traditional Schottky and diode-connected MOS transistor rectifiers, the proposed orthogonally switching CPR (OS-CPR) comprises MOS transistors as voltage-controlled switches. Analytical models for the OS-CPR are developed and presented. Circuit-level optimization techniques are employed to reduce conduction and switching losses. Simulated in a 90 nm standard CMOS technology (IBM 9RF), a 5-stage 915 MHz OS-CPR achieves a dc voltage of 1.35 V and a PCE of 11.9% with a 1 MΩ load at -18.2 dBm available input power (PS,AV). To show technology scalability of the design, the OS-CPR is also validated using AMS 0.18 μm high-voltage (HV) CMOS technology. When benchmarked with traditional rectifiers, the OS-CPR (under similar conditions) achieves a higher PCE and a higher output dc voltage. The OS-CPR is easily scalable to operate over multiple sub-GHz ISM frequency bands.

A PPM Gaussian pulse generator for ultra-wideband communications

A Gaussian pulse generator incorporating a pulse position modulator for use in an ultra-wideband or impulse radio system is described. The pulse generator is preceded by a programmable pulse-position modulator and consists of a cascade of complex first-order systems, which, in turn, are made up of differential pairs employing partial positive feedback. The resulting PPM Gaussian pulse generator has been designed to be implemented in AMS 0.35/spl mu/m CMOS IC technology. Simulations predict the correct operation of the circuit for supply voltages of 3.3Vand a power consumption of 95mW. The output monocycle indeed approximates a Gaussian monocycle very well and has a pulse duration of about 230ps. Proper modulation of the pulse in time is confirmed.

A delay filter for an ir-UWB front-end

A continuous-time analog delay is designed as a requirement for the autocorrelation function in the quadrature downconversion autocorrelation receiver (QDAR). An eight-order Fade approximation of its transfer function is selected to implement this delay. Subsequently, the orthonormal form is adopted, which is intrinsically semi-optimized for dynamic range, has low sensitivity to component mismatch, high sparsity and whose coefficients can be physically implemented. Each coefficient in the state-space description of the orthonormal ladder filter is implemented at circuit level using a novel 2-stage gm cell employing negative feedback. Simulation results in IBMs Bi-CMOS 0.12 /spl mu/m technology show that this delay filter requires a total current of 70 mA at a 1.6 V power supply. The 1-dB compression point of the delay is at 565 mV and the SNR is 47.5 dB. On performing a Monte Carlo simulation it becomes evident that the response of the frequency selective analog delay does not suffer drastically from neither process variations nor component mismatch.

Integration of a Pulse Generator on Chip Into a Compact Ultrawideband Antenna

For impulse radio ultrawideband communications an ldquoantenna plus generatorrdquo system is co-designed and an on chip generator is integrated into the antenna. This approach does away with the need for intermediate transmission lines conventionally placed between an RF device/generator and an antenna and therefore eliminates the need for a balun, prevents excitation of the common-mode currents and allows the device to be mounted directly on the antenna. The antenna and generator are designed taking into account both impedance matching and the generators influence on the antennas radiation properties. The suggested approach is verified experimentally at a scaled up version of the antenna.

An interference rejection filter for an ultra-wideband quadrature downconversion autocorrelation receiver

An analog filter is designed based upon the requirement of an interference rejection filter for the quadrature downconversion autocorrelation receiver (QDAR). The transfer function of an eight-order elliptic bandpass filter is selected. As a result, a state-space approach (i.e. the orthonormal form) is adopted, which is intrinsically semi-optimized for dynamic range, has low sensitivity, high sparsity and its coefficients can be physically implemented. Each coefficient in the state-space description of the filter is implemented at circuit level using a novel 2-stage gm cell based upon the principle of negative feedback. Simulation results in IBMs Bi-CMOS 0.18 /spl mu/m technology show that the interference rejection filter requires a total current of 90 mA at a 1.8 V power supply. The 1-dB compression point of the filter is at 565 mV and the SNR is 47.5 dB. On performing a Monte Carlo simulation, it becomes evident that the overall filter transfer response does not suffer from process variations.