Sunwoong Kim

A High-Throughput Hardware Design of a One-Dimensional SPIHT Algorithm

Video display systems include frame memory, which stores video data for display. To reduce system cost, video data are often compressed for storage in frame memory. A desirable characteristic for display memory compression is support for the raster-scan processing order and the fixed target compression ratio. Set partitioning in hierarchical trees (SPIHT) is an efficient two-dimensional compression algorithm that guarantees a fixed target compression ratio, but its one-dimensional (1D) variation has received little attention, even though its 1D nature supports the raster-scan processing order. This paper proposes a novel hardware design for 1D SPIHT. The algorithm is modified to exploit parallelism for effective hardware implementation. For the encoder, dependences that prohibit parallel execution are resolved and a pipelined schedule is proposed. For the parallel execution of the decoder, the algorithm is modified to enable estimation of the bitstream length of each pass prior to decoding. This modification allows parallel and pipelined decoding operations, leading to a high-throughput design for both encoder and decoder. Although the modifications slightly decrease compression efficiency, additional optimizations are proposed to improve such efficiency. As a result, the peak signal-to-noise ratio drop is reduced from 1.40 dB to 0.44 dB. The throughputs of the proposed encoder and decoder are 7.04 Gbps and 7.63 Gbps, respectively, and their respective gate counts are 37.2 K and 54.1 K.

Power-aware design with various low-power algorithms for an H.264/AVC encoder

H.264/AVC video compression standard provides high coding efficiency, but requires a considerable amount of complexity and power consumption. This paper presents advanced low-power algorithms for an H.264/AVC encoder and a power-aware design composed of low-power algorithms. Power reduction algorithms with frame memory compression and early skip mode decision are presented, and the search range for motion estimation is reduced for further power reduction. The proposed power-aware design controls the power consumption depending on the remaining energy by controlling the operation condition of the proposed low-power algorithms. In order to estimate the power reduction by the proposed algorithms, the power consumed by external memory as well as the bus between an H.264 encoder and an external DRAM is considered. Simulation results show that up to 49.9% of the power consumed by bus and external memory is reduced and that the power consumption from 0% to 41.56% is achieved with a reasonably small degradation of R-D performance.

A Block Truncation Coding Algorithm and Hardware Implementation Targeting 1/12 Compression for LCD Overdrive

Block truncation coding (BTC) is commonly used to compress a video to be stored in frame memory for display devices such as LCDs. The original BTC algorithm partitions an input image into 4 ×4 blocks and compresses each block to reduce the data size down to 1/4 of the original size of the data. As the size of a video displayed on an LCD increases, the frame memory size also increases. Therefore, it is necessary to reduce the frame memory size further. The previous BTC suffers from a severe quality degradation when its compression ratio exceeds 6 to the original data. This paper proposes a novel BTC-based compression algorithm of which the target compression ratio is 12. To improve the compression efficiency, the proposed algorithm adopts a bit-saving scheme that utilizes the spatial correlation between vertically adjacent blocks. Furthermore, the blocks with low image complexity are coded using one 2 × 16 coding block while those with high image complexity are coded using two 2 × 8 coding blocks. With the hardware implementation for a high throughput constraint, the memory sizes of the encoder and decoder are 21,312 bits and 5952 bits, respectively, whereas the gate counts of the encoder and decoder are 68.7 K and 13.6 K, respectively. Experimental results show that the average PSNR of the proposed algorithm is 30.03 dB and that the throughputs of the encoder and decoder are 27.5 Gbps and 63.9 Gbps at operating frequencies of 143 and 333 MHz, respectively.

RGBW image compression by low-complexity adaptive multi-level block truncation coding

Frame memory compression is a widely used image compression technique that aims to reduce the size of the frame memory in display panels such as those containing LCD and OLED technologies. Recent LCD panels use the RGBW color domain to replace the traditional RGB domain in order to enhance the brightness of LCD panels with the addition of a white component. The additional component increases the size of the frame memory but necessitates an aggressive compression algorithm. This paper proposes a novel compression algorithm for RGBW components that improves the efficiency of block truncation coding (BTC), which is widely used for LCD overdrive. The proposed lowcomplexity adaptive multi-level block truncation coding (LAM-BTC) algorithm codes RGBW color data with a width of ten bits. It adaptively selects two-level BTC or four-level BTC to enhance the quality of the images, for which a lowcomplex level selection scheme is used. Four-level BTC in the proposed algorithm codes two representative values (RV) in four RVs and infers the other two RVs using inter-color correlation. In spite of the reduced complexity, the average peak signal-to-noise ratio (PSNR) of the proposed algorithm is 0.54 dB higher than that of the previous AM-BTC at a compression ratio of eight.

Fixed-length Golomb-Rice coding by quantization level estimation

Golomb-Rice coding is one of the popular variable-length codings which require quantization of input data to meet the target compression ratio. In order to obtain the optimal quantization level, a conventional iterative approach increases the quantization level one by one until the target ratio is achieved. This iterative approach makes it difficult to implement in hard ware because the number of iterations cannot be estimated at hardware design time. This paper proposes a non-iterative algorithm for Golomb-Rice coding to estimate a near-optimal quantization level. To this end, the algorithm performs Golomb-Rice coding without any quantization of input data and then uses this coding result to estimate the codeword length with quantization. Based on the estimation, a near-optimal quantization level that meets the target length is selected. For the case when the selected level is not optimal, the algorithm performs additional Golomb-Rice codings with modified quantization levels which guarantee the codeword to meet the target length. Experimental results with twenty-four Kodak images show that the proposed coders practically cover all the optimal quantization levels.

Fixed-Ratio Compression of an RGBW Image and Its Hardware Implementation

In the latest large-screen TVs, an RGBW color domain is widely used to enhance the brightness of liquid crystal display (LCD) panels. As the correlations among RGBW color components are different from those among conventional RGB components, a compression algorithm developed for an RGB image may not be efficient for RGBW compression. For high-fidelity RGBW image coding, a novel prediction-based coding algorithm is proposed in this paper. The proposed algorithm is composed of two prediction steps that take advantage of spatial correlation and inter-color correlations, respectively. For residual coding, this paper proposes a fixed-ratio coding method based on Golomb-Rice coding. The proposed encoder is composed of two sub-coders: pre-coder and post-coder. The pre-coder estimates the length of the bitstream for various quantization levels. Based on that estimation, the appropriate quantization level is selected. The post-coder generates the final bitstream. Experimental results show that the average peak signal-to-noise ratio (PSNR) of the proposed algorithm is 51.16 dB. The throughput of the proposed encoder and decoder hardwares is 26.7 Gb/s, and their respective gate counts are 56.1 K and 39.6 K.

Optimized Interpolation and Cached Data Access in LUT-Based RGB-to-RGBW Conversion

In recent display panels, the RGBW color domain becomes popular because it improves the brightness of the display panel compared to the conventional RGB domain. An RGBW display system, in general, uses a look-up table (LUT) for fast RGB-to-RGBW conversion. However, a large-sized LUT is implemented in external memory, which slows down system speed and increases power consumption. For robust LUT-based RGB-to-RGBW conversion, this brief proposes two schemes. First, the data mapping of the LUT is sub-sampled. For fast conversion, the sub-sampled data are approximately interpolated. Moreover, the interpolation performance is improved by using a refinement scheme. Second, a small internal buffer that caches the information from the LUT is used for the conversion. When the information stored in the buffer is used for conversion, the access to the LUT of the external memory is skipped, thereby reducing the execution time during RGB-to-RGBW conversion. Experimental results show that the average of mean squared errors by the proposed sub-sampling and interpolation schemes varies from 0.00 to 21.72 when the quantization step is changed from 1 to 5, respectively. Compared to the trilinear interpolation, the proposed interpolation scheme reduces the number of accesses to the LUT from 8 to 2 and that of linear interpolation executions from 7 to 1. The proposed caching scheme with a 2.2 KB buffer reduces the execution time by 81.93%.

A design of a cost-effective look-up table for RGB-to-RGBW conversion

RGBW domain is widely used to improve the brightness of display panels without their increasing power consumption. RGBW display systems use a look-up table (LUT) for fast RGB-to-RGBW conversion. However, the LUT is implemented by a large size memory and thereby incurring high hardware cost. To reduce the size of the LUT, data mapping in the LUT are sub-sampled, which results in large errors in data conversion. Based on the piecewise-linear characteristic in color change, the sub-sampled data are linearly interpolated. In addition, the interpolation performance is improved by utilizing distribution patterns of color components. Experimental results show that the average of the mean square errors by the proposed method is 21.72 when the size of the LUT decreases to 1/215 of the original LUT size.

PS 18-10 EFFECT OF SODIUM INTAKE ON RENIN LEVEL: ANALYSIS OF GENERAL POPULATION AND META-ANALYSIS OF RANDOMIZED CONTROLLED TRIALS

Objective: We evaluated the association between sodium intake and plasma renin levels in the cross sectional study and meta-analysis of randomized controlled trials, whether there is a persistent elevation of plasma renin by longer-term sodium intake restriction. Design and Method: Plasma renin activity (PRA) and 24-hour urine sodium (24HUNa) excretion were measured from individuals randomly selected from a community. Simple and multiple linear regression analyses adjusted for age, 24-hour systolic blood pressure, 24-hour average heart rate, fasting blood glucose and gender were performed. The meta-analysis, 74 studies published from 1975 to mid-2014 identified in a systematic literature search using EMBASE, CINAHL, and MEDLINE. Random effects meta-analyses and a meta-regression analysis were performed. Results: Among the 496 participants recruited, 210 normotensive and 87 untreated hypertensive subjects were included in the analysis. There was no significant association between PRA and 24HUNa in the total population, or hypertensive and normotensive individuals. In the meta-analysis, the standard mean difference (SMD) of renin level by sodium intake reduction was 1.26 (95% CI: 1.08 to 1.44, Zu200a=u200a12.80, Pu200a<u200a0.001, I2u200a=u200a87%). In the meta-regression analysis, an increase in a day of intervention was associated with a fall in SMD by −0.04 (95% CI: −0.05 to −0.02, Zu200a=u200a−5.27, Pu200a<u200a0.001, I2u200a=u200a86%), indicating that longer duration of reduced sodium intake would lead to lesser SMD of renin level. Conclusions: The present population based cross-sectional study and meta-analysis suggests that prolonged reduction in sodium intake is very unlikely associated with elevation of plasm renin levels.

Ps 18-11 Estimation of 24-Hour Urine Sodium From Multiple Spot Urine Samples:

Objective: Estimation of 24-hour urine sodium excretion using spot urine (SU) sample has been challenged due to limited accuracy despite of its convenience. We developed equation estimating 24HUNa using average of three SU samples, validated and compared to the equations using single SU sample. Design and Method: Data of morning first, morning and evening SU from 74 individuals were used in the development of equations using average of three SU. The developed equation was validated with data of morning first, daytime and evening SU samples from 174 individuals, and compared to the equations using single SU sample. Results: The equation using average of three SU samples showed the lowest bias of -2.9u200ammol/24-h. The equations using single SU sample had bias more than 10u200amm/24-h. In the correlation analysis with measured 24HUNa, the ICC of estimated 24HUNa by equation using average of three SU samples was 0.909 and CCC was 0.832. The limits of agreement was -64.1 to 58.3u200ammol/24-h for equation using average of three SU samples, but around 100u200ammol/24-hr for the equations using single SU sample. Although all the equations showed tendency of over- and under-estimation of 24HUNa depending on the measured 24HUNa, the equation using average of 3 SU samples showed the slope closer to zero among the equations. Conclusions: The equation developed using average of three SU samples showed improved estimation of 24HUNa in population and individual levels compared to the equations using single SU sample.