Svetlana M. Seledzhi

Hidden Oscillations in Nonlinear Control Systems

Abstract The method of harmonic linearization, numerical methods, and the applied bifurcation theory together discover new opportunities for analysis of hidden oscillations of control systems. In the present paper new analytical-numerical algorithm for hidden oscillation localization is discussed. Counterexamples construction to Aizermans conjecture and Kalmans conjecture on absolute stability of control systems are considered.

STABILITY AND BIFURCATIONS OF PHASE-LOCKED LOOPS FOR DIGITAL SIGNAL PROCESSORS

For continuous and discrete floating phase-locked loops, conditions of local and global stability are obtained. For discrete systems, period-doubling bifurcations are described. The results obtained are applied to the solution of the problem of eliminating the clock skew in digital signal processors.

Hidden oscillations in stabilization system of flexible launcher with saturating actuators

Abstract In the paper the attitude stabilization system of the unstable flexible launcher with saturating input is considered. It is demonstrated that due to actuator saturation the system performance can significantly degrade. The analytical-numerical method is applied to demonstrate possibility of hidden oscillations and localize their attractor.

Nonlinear Analysis and Design of Phase-Locked Loops

Phase-locked loops (PLLs) are widely used in telecommunication and computer architectures. They were invented in the 1930s-1940s (De Bellescize, 1932; Wendt & Fredentall, 1943) and then intensive studies of the theory and practice of PLLs were carried out (Viterbi, 1966; Lindsey, 1972; Gardner, 1979; Lindsey and Chie, 1981; Leonov et al., 1992; Encinas, 1993; Nash, 1994; Brennan, 1996; Stensby, 1997). One of the first applications of phase-locked loop (PLL) is related to the problems of data transfer by radio signal. In radio engineering PLL is applied to a carrier synchronization, carrier recovery, demodulation, and frequency synthesis (see, e.g., (Stephens, 2002; Ugrumov, 2000)). After the appearance of an architecture with chips, operating on different frequencies, the phase-locked loops are used to generate internal frequencies of chips and synchronization of operation of different devices and data buses (Young et al., 1992; Egan, 2000; Kroupa, 2003; Razavi, 2003; Shu & Sanchez-Sinencio, 2005; Manassewitsch, 2005). For example, the modern computer motherboards contain different devices and data buses operating on different frequencies, which are often in the need for synchronization (Wainner & Richmond, 2003; Buchanan & Wilson, 2001). Another actual application of PLL is the problem of saving energy. One of the solutions of this problem for processors is a decreasing of kernel frequency with processor load. The independent phase-locked loops permit one to distribute more uniformly a kernel load to save the energy and to diminish a heat generation on account of that each kernel operates on its own frequency. Now the phase-locked loops are widely used for the solution of the problems of clock skew and synchronization for the sets of chips of computer architectures and chip microarchitecture. For example, a clock skew is very important characteristic of processors (see, e.g., (Xanthopoulos, 2001; Bindal, 2003)). Various methods for analysis of phase-locked loops are well developed by engineers and are considered in many publications (see, e.g., (Banerjee, 2006; Best, 2003; Kroupa, 2003; Bianchi, 2005; Egan, 2007)), but the problems of construction of adequate nonlinear models and nonlinear analysis of such models are still far from being resolved and require using special methods of qualitative theory of differential, difference, integral, and integro-differential equations (Gelig et al., 1978; Leonov et al., 1996a; Leonov et al., 1996b; Leonov & Smirnova, 2000; Abramovitch, 2002; Suarez & Quere, 2003; Margaris, 2004; Kudrewicz & Wasowicz, 2007; Kuznetsov, 2008; Leonov, 2006). We could not list here all references in the area of design and

BPSK Costas loop: Simulation of nonlinear models in MatLab Simulink

Nonlinear analysis of BPSK Costas loop is a difficult task, so for its analysis simplified mathematical models and their simulation are widely used. In the work it is shown that the use of simplified mathematical models and the application of non-rigorous methods of analysis may lead to wrong conclusions concerning the operability of real model of BPSK Costas loop. Corresponding examples of BPSK Costas loop simulation in MatLab Simulink are presented.

Nonlinear models of BPSK Costas loop

Rigorous nonlinear analysis of the physical model of Costas loop is very difficult task, so for analysis, simplified mathematical models and numerical simulation are widely used. In the work it is shown that the use of simplified mathematical models, and the application of non rigorous methods of analysis may lead to wrong conclusions concerning the operability of Costas loop.

Simulation of phase-locked loops in phase-frequency domain

This article is devoted to simulation of classical phase-locked loop (PLL). Based on new analytical method for computation of phase detector characteristics (PD), an realization in Simulink for simulation of classical PLL in phase space for general types of signal waveforms is done. This enables to avoid a number of numerical problems in the simulation of PLL in signal.

Best's conjecture on pull-in range of two-phase Costas loop

In the present work for checking conjecture on pull-in range of two-phase Costas loop, a number of numerical experiments in MatLab Simulink has been made. In addition, the analytical approach to the proof of the conjecture is presented.

Nonlinear mathematical models of Costas Loop for general waveform of input signal

It is well known, that to effectively simulate and investigate PLL systems, nonlinear mathematical model has to be derived. This article provides mathematical model of Costas Loop circuit for wide range of signal waveforms. Investigation of Costas Loop in signal domain is reduced to nonlinear phase domain model of PLL with special phase detector characteristics. This allows to avoid a number of numerical problems in the simulation of Costas Loop in signal domain.

ANALYSIS OF PHASE-LOCKED SYSTEMS WITH DISCONTINUOUS CHARACTERISTICS

Abstract Array processors are widespread in real-time systems. In the last ten years phase–locked loops have widely been used in array processors as control devices correcting a clock skew. In this paper new type of floating phase–locked loops for array processors is designed. For the floating phase locked loops new stability conditions are obtained.