T. Cholakova

Study of the Structural and Mechanical Properties of Nanocrystalline TiAlSiN Gradient Coatings

A study of the structural and mechanical properties of nanocrystalline TiAlSiN gradient coatings deposited by cathodic arc deposition techniques at 500 °C and post-annealed at 525 °C is presented. Analysis of the coatings, chemical composition and microstructure revealed that the coatings have a structure based on (Ti, Al)N nanocrystals with an average size of 10 nm embedded in an amorphous Si3N4 phase. The study of the mechanical properties showed that post-annealing causes improvement and increase of the coatings hardness. A maximum hardness of 48 GPa and elastic modulus of 560 GPa were measured. Also, excellent adhesion to the WC-Co substrate was observed in the post-annealed coatings.

Mechanical, Structural and Thermal Properties of Multilayered Gradient Nanocomposite Coatings

Multilayered, Gradient Tialsin-Based Nanocomposite Coatings Have Been Developed and Investigated with Respect to their Applicability in the Machining Industry. the Main Coating Layer Was Composed of 5-8 Nm Tin and Aln Nanograins. the Coating Possessed Hardness as High as 40 GPA, which Allows it to Be Classified as Superhard. during Heating up to 900oC in Air in Steps of 100oC for 6 H at each Temperature, the Coating Showed Good Stability up to 700oC. Thermal Treatment over this Temperature Caused a Decrease in the Hardness to Values Characteristic for Tialn Multilayered Coatings, while the Adhesion to the Substrate Remained Steady.

Investigation of ZrN Hard Coatings Obtained by Cathodic Arc Evaporation

Zirconium nitrides (ZrN) coatings have shown better quality in comparison to titanium nitrides (TiN) ones regarding the application in the mechanical processing of aluminum and titanium alloys. This work presents the results from investigation on properties of ZrN-based coatings intended for industrial application. The ZrN and ZrTiN hard coatings in a thickness of (3 5) m were obtained on stainless steel substrates by cathodic arc evaporation method. The coating hardness in the range of 25-32 GPa was evaluated using the Vickers measurement technique. The coating properties were studied in relation to the surface morphology by Atomic force microscopy (AFM) and Scanning electron microscopy (SEM). The analyses showed that the number and size of the macroparticles decrease when N2 pressure increases in the deposition chamber. X-ray diffraction analysis (XRD) was performed to identify the crystallographic structure, preferred orientation and stress of the ZrN coatings.

Ti- and Cr-based hard coatings obtained at low temperatures by unbalanced magnetron sputtering

We prepared a set of Ti- and Cr-based ternary and quaternary hard coatings at low deposition temperatures (< 200 °C) by closed-field unbalanced magnetron sputtering in a gas mixture of Ar + N2. The morphological, structural and mechanical properties of the coatings were characterized by means of atomic force microscopy, scanning electron microscopy, X-ray photoelectron spectrometry, a micro-scratch tester and a nanoindentation tester. The results of the analyses performed revealed that the surface of the deposited ternary Ti-Al-N coatings was rougher than that of the CrTiAlN coatings. The metallic elements in the coatings react with nitrogen to form CrN, TiN and AlN nitride phases, as no Cr2N phase was detected in the Cr-based coatings. The optimized quaternary coating demonstrated mechanical properties superior to those of the ternary ones in terms of hardness; adherence strength of 32 GPa and elastic modulus of 418 GPa were measured for the multicomponent coating of composition Cr0.68Ti0.19Al0.13N.

The Reactive Neutral Beam Etching of SiC and its Application in p-n Junction Periphery Protection

This paper presents much more details on the process of etching n and p type SiC using a dc saddle field source. Here is described a method for stabilizing the dc discharge by adding controlled flow of O2 to SF6 in the source chamber. This kind of etching is used to fabricate 4H-SiC p-i-n diodes with a junction periphery protection. The effect of the junction periphery protection, the source power that terminates the etching process and testing environment on the breakdown voltage are investigated. The optimised p-i-n diodes exhibit a stable reverse bias operation with a breakdown voltage of 1700 V.

P-n Junction Periphery Protection of 4H-SiC Power p-i-n Diodes Using Epitaxy and Dry Etching

In high voltage devices the breakdown voltage is reduced from its theoretical value by the occurrence of high electric field at the device p-n edge and therefore a further extension of the space charge is needed in this area. In the approach used in this work the p epitaxial layer is extended over the main junction (5 mm total area) and effects on its periphery by the total incorporated acceptor charge. We used saddle field fast atom beam (FAB) source for etching of the extended p area, which allows precise control of the etched rate and respectively of the charge. Using a typical player concentration of 8.10cm the calculated thickness of extended p layer is 15 nm. At the same time, the measured reverse IR-VR characteristics at different stages of etching (different thickness of the extended player) show that the optimal thickness is 150-200 nm. This non-coincidence is explained by the existence of an interface layer between no and p + epitaxial layers, where the acceptor concentration is completely different from the average measured one. The diodes, prepared by the described method, have decreased reversed currents and increased breakdown voltage in comparison with the vertical mesa design diodes. Our experimental results show that the proposed method is effective and more applicable for protection of the junction edge of high voltage SiC diodes.

4H-SiC pn Diode Grown by LPE Method for High-Power Applications

The current-voltage (I-V) characteristics of large area (5 mm) 4H-SiC pn diodes fabricated by liquid phase epitaxy (LPE) were studied up to 2 kA/cm 2 in the temperature range from 20 to 300 C. At 200 A/cm and room temperature, the forward voltage drop (V F) was measured to be 3.7 V. The specific on-state resistance (R on) was found to be (2.3-3.4) m Ω⋅cm . The VF showed a negative temperature coefficient in the investigated region. The lon g-term stability testing of the pn diodes during 100 hr at forward current density of 200 A/cm 2 was performed. The V F increased by 0.2 V with time. Deep traps were investigated before and after l ong-term testing. A deep trap with thermal activation energy of E C-1.43±0.03 eV was detected after diode operation during 20 hr at 200 A/cm. It is speculated that this deep trap determines the degradation of electrical characteristics.

Reliability of 4H-SiC p-n Diodes on LPE Grown Layers

In this paper we present for the first time the results from the long-term testing of power p-n diodes, grown on 4H-SiC substrates by liquid phase epitaxy (LPE) . A comparison with 4H-SiC p-n diodes, made on commercially available chemical vapor deposi tion (CVD) ppnon + epitaxial wafers within the same device processing, is given. The incre ase of the forward voltage drop, ∆VF, as a function of the time for LPE and CVD diodes was observed. The s triking feature was that the forward degradation in LPE diodes is expressed in less extent tha n he CVD ones. The observed lower degradation of the LPE diodes is explained by the lower recombi nation centers density (<10 13 cm) in LPE layers and consequently of the lower defects propagation w hen the diodes are subjected to a current load. At the same time, an increase of the specific on-state resistance is observed, which is explained by the presence of thin transition layer. Introduction The recent investigation of the long-term reliability of CVD 4H-Si C p-n diodes at pulsed or constant forward current (100 A/cm 2 or more), revealed an increase of forward voltage drop with the time [1, 2, 3]. This phenomenon was interpreted as a consequence of re ombination-enhanced stacking faults formation, which lowers the forward current [4, 5]. Ot her material defects such as screw and edge dislocations, impurities and grain boundaries were al so discussed as a reason for the device degradation. As a result, the current density of the individual l arge area SiC chips is limited to about 200 A/cm at operation temperature of 125oC – too far from the potential of SiC material. That is why the degradation phenomenon is becoming a key issue in powe r SiC device technology. Meanwhile, it was demonstrated [6] that the SiC layers grown by LPE have reduced density of deep traps (<10 cm ) and micropipes in comparison to the CVD ones. In this paper we present for the first time the results from the long-term testing of power p-n diodes, grown on 4H-SiC substrates by LPE. A comparison with 4H-SiC p-n diodes, made on commercially available CVD p non + epitaxial wafers from Cree Inc. within the same device processing, is given. Experimental details The LPE grown p pnon + structure had an undoped (drift) n o layer with thickness of 10 m and concentration of 3 x 10 16 cm, while the values of the counterpart CVD drift layer were 6 m and 5x10 cm, respectively. Both kinds of diodes were prepared with the same active area of 5 mm. The p-n junctions of the devices were terminated by deep mesa et ching, made by RIE in RF SF6 plasma. The SiC chips were attached to the Mo-Cu base plates of metal-ceram ic packages using Materials Science Forum Online: 2003-09-15 ISSN: 1662-9752, Vols. 433-436, pp 929-932 doi:10.4028/www.scientific.net/MSF.433-436.929