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Featured researches published by T. Kozek.


IEEE Transactions on Circuits and Systems I-regular Papers | 1993

Genetic algorithm for CNN template learning

T. Kozek; Tamás Roska; Leon O. Chua

A learning algorithm for space invariant cellular neural networks (CNNs) is described. Learning is formulated as an optimization problem. Exploration of any specified domain of stable CNNs is possible by the current approach. Templates are derived using a genetic optimization algorithm. Details of the algorithm are discussed and several application results are shown. Using this algorithm, propagation-type and gray-scale-output CNNs can also be designed. >


IEEE Transactions on Circuits and Systems I-regular Papers | 1995

Simulating nonlinear waves and partial differential equations via CNN. II. Typical examples

T. Kozek; Leon O. Chua; Tamás Roska; D. Wolf; Ronald Tetzlaff; F. Puffer; K. Lotz

For part I see ibid., vol.42, no.10, pp.807-15 (1995). Application of cellular neural network (CNN) paradigm of locally connected analog array-computing structures is considered for solving partial differential equations (PDEs) and systems of ordinary differential equations (ODE). Three examples are presented: a chain of particles with nonlinear interactions, solitons in a nonlinear Klein-Gordon equation, and an application of a reaction-diffusion CNN for fingerprint enhancement. >


IEEE Circuits & Devices | 1996

CNN universal chips crank up the computing power

Lo Chua; Tamás Roska; T. Kozek; Ákos Zarándy

New cellular neural network chips, with stored-program capability and analog-and-logic architecture, are poised to challenge all-digital processing. In this article, we highlight the key ideas leading to the CNN Universal Machine, using simple circuit interpretations. We also illustrate the system, software, and application aspects.


International Journal of Circuit Theory and Applications | 1992

A digital multiprocessor hardware accelerator board for cellular neural networks : CNN-HAC

Tamás Roska; Gusztáv Bártfai; Péter Szolgay; Tamás Szirányi; András Radványi; T. Kozek; Zsolt Ugray; Ákos Zarándy

Analogue realizations of neural networks are superior in speed. the hardware accelerator boards using catalogue programmable VLSI ICs represent a trade-off having higher reconfigurability and lower cost. This paper presents such a solution for a cellular neural network (CNN). The architecture of the present design (CNN-HAC) using four standard DSPs to calculate the transient response of a one-layer CNN containing (0.25–0.75) × 106 analogue neural cells (depending on the type of template) is presented. the architecture and also the design principles are independent of the number of processors. the actual design was made in the form of a PC add-on board. The global control unit, which connects the board to the host firmware and communicates control signals to/from the local control units of the DSPs, was realized mainly with EPLDs. A special correspondence between the virtual processing elements—calculating the time-discrete models of the analogue neural cells—and the physical ones is discussed in detail. It is realized in an architecture with a simple, two-directional interprocessor communication. This architecture can be ‘scaled down’ using faster processors, EPLDs and memories. the present version runs with 2 μs/cell/iteration speed.


ieee international workshop on cellular neural networks and their applications | 1990

A hardware accelerator board for cellular neural networks: CNN-HAC

Tamás Roska; Gusztáv Bártfai; Péter Szolgay; Tamás Szirányi; András Radványi; T. Kozek; Zs. Ugray

The hardware accelerator (HAC) boards using catalog programmable VLSI ICs represent a trade-off having higher reconfigurability and lower cost. This paper presents such a solution for a cellular neural network (CNN). The architecture of the present design (CNN-HAC) using 4 standard DSPs to calculate the transient response of a one-layer CNN containing 0.25-1.0 million analog neural cells is presented. The architecture and also the design principles are independent of the number of processors. The actual design was made in the form of a PC add-on board. The global control unit, which connects the board to the host firmware and communicates control signals to/from the local control units of the DSPs, was realized mainly with EPLDs. A special correspondence between the virtual processing elements-calculating the time discrete models of the analog neural cells-and the physical ones, established to work an architecture with an infrequent, one-directional interprocessor communication, is discussed in detail.<<ETX>>


IEEE Transactions on Neural Networks | 2000

Morphology and autowave metric on CNN applied to bubble-debris classification

István Szatmári; Abraham Schultz; Csaba Rekeczky; T. Kozek; Tamás Roska; Leon O. Chua

In this study, we present the initial results of cellular neural network (CNN)-based autowave metric to high-speed pattern recognition of gray-scale images. the application is to a problem involving separation of metallic wear debris particles from air bubbles. This problem arises in an optical-based system for determination of mechanical wear. This paper focuses on distinguishing debris particles suspended in the oil flow from air bubbles and aims to employ CNN technology to create an online fault monitoring system. For the class of engines of interest bubbles occur much more often than debris particles and the goal is to develop a classification system with an extremely low false alarm rate for misclassified bubbles. The designed analogic CNN algorithm detects and classifies single bubbles es and bubble groups using binary morphology and autowave metric. The debris particles are separated based on autowave distances computed between bubble models and the unknown objects. Initial experiments indicate that the proposed algorithm is robust and noise tolerant and when implemented on a CNN universal chip it provides a solution in real time.


ieee international workshop on cellular neural networks and their applications | 1998

A 0.5 /spl mu/m CMOS CNN analog random access memory chip for massive image processing

R. Carmona; S. Espejo; R. Dominguez-Castro; A. Rodriguez-Vazque; Tamás Roska; T. Kozek; Leon O. Chua

An analog RAM has been designed to act as a cache memory for a CNN Universal Machine. Hence, all the non-standard chips are available for the CNN Chipset architecture. Time-multiplexed analog routines in the CNN processor require fast and efficient short-time signal storage in an analog buffer. This can be achieved by an extended sample and hold scheme able to address every sample to specific memory locations. Several arrays of capacitors are multiplexed sharing controlling circuitry and I/O buses. The design has the following key parameters: 637 analog memory cells/mm/sup 2/ with 0.4% accuracy, 100 ns access time and 170 ms storage time (within 1% error).


IEEE Transactions on Multimedia | 1999

An 0.5-/spl mu/m CMOS analog random access memory chip for TeraOPS speed multimedia video processing

Ricardo Carmona-Galán; Ángel Rodríguez-Vázquez; S. Espejo-Meana; R. Dominguez-Castro; Tamás Roska; T. Kozek; Leon O. Chua

Data compressing, data coding, and communications in object-oriented multimedia applications like telepresence, computer-aided medical diagnosis, or telesurgery require an enormous computing power-in the order of trillions of operations per second (TeraOPS). Compared with conventional digital technology, cellular neural/nonlinear network (CNN)-based computing is capable of realizing these TeraOPS-range image processing tasks in a cost-effective implementation. To exploit the computing power of the CNN Universal Machine (CNN-UM), the CNN chipset architecture has been developed-a mixed-signal hardware platform for CNN-based image processing. One of the nonstandard components of the chipset is the cache memory of the analog array processor, the analog random access memory (ARAM). This paper reports on an ARAM chip that has been designed and fabricated in a 0.5-/spl mu/m CMOS technology. This chip consists of a fully addressable array of 32/spl times/256 analog memory registers and has a packing density of 637 analog-memory-cells/mm/sup 2/. Random and nondestructive access of the memory contents is available. Bottom-plate sampling techniques have been employed to eliminate harmonic distortion introduced by signal-dependent feedthrough. Signal coupling and interaction have been minimized by proper layout measures, including the use of protection rings and separate power supplies for the analog and the digital circuitry. This prototype features an equivalent resolution of up to 7 bits-measured by comparing the reconstructed waveform with the original input signal. Measured access times for writing/reading to/from the memory registers are of 200 ns. I/O rates via the l6-line-wide I/O bus exceed 10 Msamples/s. Storage time at room temperature is in the 80 to 100 ms range, without accuracy loss.


International Journal of Circuit Theory and Applications | 1996

A DOUBLE TIME—SCALE CNN FOR SOLVING TWO-DIMENSIONAL NAVIER—STOKES EQUATIONS†

T. Kozek; Tamás Roska

A practical cellular neural network (CNN) approximation to the Navier-Stokes equation describing the viscous flow of incompressible fluids is presented. The implementation of the CNN templates based on a finite-difference discretization scheme, including the double-timescale CNN dynamics and the treatment of various types of boundary conditions are explained. The operation of the continuous-time model is demonstrated through several examples.


ieee international workshop on cellular neural networks and their applications | 1996

Multi-scale image analysis on the CNN Universal Machine

T. Kozek; K.R. Crounse; Tamás Roska; Lo Chua

Algorithms for generating multi-scale representations of gray-scale images are presented. A number of possible approaches are described to produce low-pass and band-pass decompositions using simple analogic algorithms. It is also shown how the wavelet transform can be approximated with a similar technique and be used to obtain multi-level descriptions of the input data. This paper presents some methods how the cellular neural network (CNN) Universal Machine can be used effectively for generating multi-scale representations of gray-scale imagery.

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Tamás Roska

Pázmány Péter Catholic University

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Leon O. Chua

Hungarian Academy of Sciences

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Péter Szolgay

Pázmány Péter Catholic University

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Ákos Zarándy

University of California

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Csaba Rekeczky

University of California

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Lo Chua

University of California

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Ákos Zarándy

University of California

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S. Zöld

Hungarian Academy of Sciences

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András Radványi

Hungarian Academy of Sciences

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K. László

Hungarian Academy of Sciences

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