T. Kugathasan

Radiation hardness and detector performance of new 180nm CMOS MAPS prototype test structures developed for the upgrade of the ALICE Inner Tracking System

The features of the 180nm TowerJazz1 CMOS technology allow for the first time the use of CMOS Monolithic Active Pixel Sensors (MAPS) under the harsh operational conditions of the LHC experiments. The stringent requirements of the ALICE Inner Tracking System (ITS) in terms of material budget, radiation hardness, readout speed and a low power consumption have thus lead to the choice of MAPS as baseline technology option for the recently approved upgrade of the ITS and are the key drivers for R&D efforts on basic transistor and Explorer and MIMOSA pixel sensor prototypes produced in TowerJazz technology. Though the radiation loads expected for the ITS are below those of ATLAS and CMS, it is however necessary to assess the radiation hardness for ITS MAPS prototypes. Total Ionizing Dose (TID) radiation hardness has been established for basic transistor structures using a 60keV X-ray machine. The main operational characteristics and detection properties such as noise, charge collection efficiency and signal over noise ratio of Explorer-0 and MIMOSA32 and MIMOSA34 pixel sensor prototypes have been studied using X-rays (55Fe) and test beams at CERN and DESY before and after Non Ionizing Energy Loss (NIEL) and TID irradiation. In this paper the results of these R&D activities will be presented and discussed.

MAPS development for the ALICE ITS upgrade

Monolithic Active Pixel Sensors (MAPS) offer the possibility to build pixel detectors and tracking layers with high spatial resolution and low material budget in commercial CMOS processes. Significant progress has been made in the field of MAPS in recent years, and they are now considered for the upgrades of the LHC experiments. This contribution will focus on MAPS detectors developed for the ALICE Inner Tracking System (ITS) upgrade and manufactured in the TowerJazz 180 nm CMOS imaging sensor process on wafers with a high resistivity epitaxial layer. Several sensor chip prototypes have been developed and produced to optimise both charge collection and readout circuitry. The chips have been characterised using electrical measurements, radioactive sources and particle beams. The tests indicate that the sensors satisfy the ALICE requirements and first prototypes with the final size of 1.5 × 3 cm2 have been produced in the first half of 2014. This contribution summarises the characterisation measurements and presents first results from the full-scale chips.

First tests of a novel radiation hard CMOS sensor process for Depleted Monolithic Active Pixel Sensors

The upgrade of the ATLAS [1] tracking detector for the High-Luminosity Large Hadron Collider (LHC) at CERN requires novel radiation hard silicon sensor technologies. Significant effort has been put into the development of monolithic CMOS sensors but it has been a challenge to combine a low capacitance of the sensing node with full depletion of the sensitive layer. Low capacitance brings low analog power. Depletion of the sensitive layer causes the signal charge to be collected by drift sufficiently fast to separate hits from consecutive bunch crossings (25 ns at the LHC) and to avoid losing the charge by trapping. This paper focuses on the characterization of charge collection properties and detection efficiency of prototype sensors originally designed in the framework of the ALICE Inner Tracking System (ITS) upgrade [2]. The prototypes are fabricated both in the standard TowerJazz 180nm CMOS imager process [3] and in an innovative modification of this process developed in collaboration with the foundry, aimed to fully deplete the sensitive epitaxial layer and enhance the tolerance to non-ionizing energy loss. Sensors fabricated in standard and modified process variants were characterized using radioactive sources, focused X-ray beam and test beams before and after irradiation. Contrary to sensors manufactured in the standard process, sensors from the modified process remain fully functional even after a dose of 1015neq/cm2, which is the the expected NIEL radiation fluence for the outer pixel layers in the future ATLAS Inner Tracker (ITk) [4].

Radiation hardness and timing studies of a monolithic TowerJazz pixel design for the new ATLAS Inner Tracker

A part of the upcoming HL-LHC upgrade of the ATLAS Detector is the construction of a new Inner Tracker. This upgrade opens new possibilities, but also presents challenges in terms of occupancy and radiation tolerance. For the pixel detector inside the inner tracker, hybrid modules containing passive silicon sensors and connected readout chips are presently used, but require expensive assembly techniques like fine-pitch bump bonding. Silicon devices fabricated in standard commercial CMOS technologies, which include part or all of the readout chain, are also investigated offering a reduced cost as they are cheaper per unit area than traditional silicon detectors. If they contain the full readout chain, as for a fully monolithic approach, there is no need for the expensive flip-chip assembly, resulting in a further cost reduction and material savings. In the outer pixel layers of the ATLAS Inner Tracker, the pixel sensors must withstand non-ionising energy losses of up to 1015 n/cm2 and offer a timing resolution of 25 ns or less. This paper presents test results obtained on a monolithic test chip, the TowerJazz 180nm Investigator, towards these specifications. The presented program of radiation hardness and timing studies has been launched to investigate this technologys potential for the new ATLAS Inner Tracker.

Front end optimization for the monolithic active pixel sensor of the ALICE Inner Tracking System upgrade

ALICE plans to replace its Inner Tracking System during the second long shut down of the LHC in 2019 with a new 10 m2 tracker constructed entirely with monolithic active pixel sensors. The TowerJazz 180 nm CMOS imaging Sensor process has been selected to produce the sensor as it offers a deep pwell allowing full CMOS in-pixel circuitry and different starting materials. First full-scale prototypes have been fabricated and tested. Radiation tolerance has also been verified. In this paper the development of the charge sensitive front end and in particular its optimization for uniformity of charge threshold and time response will be presented.

Low power, high resolution MAPS for particle tracking and imaging

We describe here the first monolithic pixel detector prototype embedding the OrthoPix architecture, specifically designed to deal with imaging applications where the relevant number of pixel hit per frame (occupancy) is small (on the order or less than 1%), like in High Energy Physics, Medical Imaging and other applications. Current state of the art employs complex circuitry into the pixel cell to discriminate relevant signals, leading to an extremely effective, non-destructive compression at the price of large power consumption and pixel area limitations. The OrthoPix architecture instead implements a passive projective compression scheme, leading to low power, small pixel cell and large area devices.

A CMOS 0.18 μm 600 MHz clock multiplier PLL and a pseudo-LVDS driver for the high speed data transmission for the ALICE Inner Tracking System front-end chip

This work presents the 600 MHz clock multiplier PLL and the pseudo-LVDS driver which are two essential components of the Data Transmission Unit (DTU), a fast serial link for the 1.2 Gb/s data transmission of the ALICE inner detector front-end chip (ALPIDE). The PLL multiplies the 40 MHz input clock in order to obtain the 600 MHz and the 200 MHz clock for a fast serializer which works in Double Data Rate mode. The outputs of the serializer feed the pseudo-LVDS driver inputs which transmits the data from the pixel chip to the patch panel with a limited number of signal lines. The driver drives a 5.3 m-6.5 m long differential transmission line by steering a maximum of 5 mA of current at the target speed. To overcome bandwidth limitations coming from the long cables the pre-emphasis can be applied to the output. Currents for the main and pre-emphasis driver can individually be adjusted using on-chip digital-to-analog converters. The circuits will be integrated in the pixel chip and are designed in the same 0.18 μm CMOS technology and will operate from the same 1.8 V supply. Design and test results of both circuits are presented.

Radiation hard analog circuits for ALICE ITS upgrade

The ALICE experiment is planning to upgrade the ITS (Inner Tracking System) [1] detector during the LS2 shutdown. The present ITS will be fully replaced with a new one entirely based on CMOS monolithic pixel sensor chips fabricated in TowerJazz CMOS 0.18 μ m imaging technology. The large (3 cm × 1.5 cm = 4.5 cm2) ALPIDE (ALICE PIxel DEtector) sensor chip contains about 500 Kpixels, and will be used to cover a 10 m2 area with 12.5 Gpixels distributed over seven cylindrical layers. The ALPOSE chip was designed as a test chip for the various building blocks foreseen in the ALPIDE [2] pixel chip from CERN. The building blocks include: bandgap and Temperature sensor in four different flavours, and LDOs for powering schemes. One flavour of bandgap and temperature sensor will be included in the ALPIDE chip. Power consumption numbers have dropped very significantly making the use of LDOs less interesting, but in this paper all blocks are presented including measurement results before and after irradiation with neutrons to characterize robustness against displacement damage.

iMPACT: Innovative pCT scanner

This is a short conference record (a detailed article will be submitted for peer-reviewed publication after the project will gather the first data) about the iMPACT project, which aims to build a novel pCT scanner for protons of medical energy (200-300 MeV range) designed to improve the current state of the art in protons tracking at all levels: speed, spatial resolution and material budget. Scanning time will be limited to few seconds, the material budget reduced by a factor 4 (respect to micro-strip based detectors) and the spatial resolution pushed down to the 10 μm range mark. Such performance improvements will provide completely new opportunities to apply pCT for both diagnostic and treatment purposes. Together with the performance improvements, cost reduction would result as well, as the proposed detector is based on commercially available technology, opening the way for future commercial implementations of the system.

Explorer-0: A Monolithic Pixel Sensor in a 180 nm CMOS process with an 18 µm thick high resistivity epitaxial layer

This work presents the design and characterization of Explorer-0, a Monolithic Active Pixel Sensor (MAPS) developed in the framework of the R&D activity for the upgrade of the Inner Tracking System (ITS) of the ALICE experiment at CERN. The Explorer-0 chip has been manufactured in the TowerJazz 180 nm CMOS Imaging Sensor process, based on a high-resistivity (p > 1 k Ω · cm), 18 μm thick, epitaxial layer. It contains different pixel designs with a variation of the collection electrode shape and pixel pitch (20 μm and 30 μm). The pixel circuit offers the possibility of varying the sensor bias and to decouple the read-out time from the charge integration time. Charge collection properties of the different pixel designs have been studied with respect to the sensor bias using a 5.9 keV X-ray source (55Fe) and a 4 GeV/c electron beam. The radiation tolerance of this technology in view of the expected radiation levels foreseen in ALICE has been established as well. The sensor capacitance, which is a key parameter for a compact low-power front-end design, has been estimated. Based on these results, a second version of the Explorer chip has been designed and successfully tested. The latter has a lower contribution of the circuit to the overall input capacitance allowing for a higher sensor Signal to Noise Ratio (SNR).