Tae Hoon Jeong

Study on the Effects of Zr-Incorporated InZnO Thin-Film Transistors Using a Solution Process

The effects of adding Zr into solution-processed InZnO (IZO) thin-film transistors (TFTs) were investigated with varying Zr content. ZrInZnO (ZIZO) TFTs showed a lower off-current and a sharper subthreshold swing than IZO TFTs. The addition of Zr plays a role in reducing the oxygen vacancies, and thus effectively decreases the carrier concentrations of the ZIZO active layer. The characteristics of various DC bias stresses are provided and discussed to evaluate the reliability of ZIZO TFTs. After 1000 s of various DC bias stresses, although the threshold voltage may shift dramatically, variations in subthreshold swing are negligible.

Direct Current (DC) Bias Stress Characteristics of a Bottom-Gate Thin-Film Transistor with an Amorphous/Microcrystalline Si Double Layer

Copyright 2011 KIEEME. All rights reserved. This is an open-access article distributed under the terms of the Creative Commons Attribution Non-Commercial License (http://creativecommons.org/licenses/by-nc/3.0) which permits unrestricted noncommercial use, distribution, and reproduction in any medium, provided the original work is properly cited. pISSN: 1229-7607 eISSN: 2092-7592 DOI: http://dx.doi.org/10.4313/TEEM.2011.12.5.197 TRANSACTIONS ON ELECTRICAL AND ELECTRONIC MATERIALS Vol. 12, No. 5, pp. 197-199, October 25, 2011

New Crystallization Method of Amorphous Silicon by Selective Area Heating for Stamp Process

We propose a new crystallization technique called selective area heating. In this study, we investigated a new technique for high-reliability selective area crystallization of a-Si films that does not cause thermal damage to glass substrates. We reduced the crystallization time as compared to the conventional solid phase crystallization method using a stamp-type isolated thin heater. The thin heater was fabricated with a layer of Pt on a quartz substrate via Ta adhesion and capping layers. A crystalline transverse optic phonon peak at about 519 cm−1 was seen in Raman scattering spectra, showing that the films were crystallized. The poly-Si grain size was found to be smaller than 100 nm, and the dendritic structure was found using scanning electron microscopy.

Study on the Electrical Characteristics of Solution-processed ZrInZnO Thin-film Transistors

Soution-processed ZrInZnO (ZIZO) thin-film transistors (TFTs) with varying Zr content were fabricated. The ZIZO TFT (Zr

Electrical analysis of bottom gate TFT with novel process architecture

Abstract Bottom gate thin film transistors (TFTs) with microcrystalline and amorphous Si (a‐Si) double active layers (DAL) were fabricated. Since the process of DAL TFTs can use that of conventional a‐Si TFTs, these DAL TFT process has advantages, such as low cost, large substrate, and mass production capacity. In order to analyze the degradation characteristics in saturation region for driving TFTs of active matrix organic light emitting diode, three different dynamic stresses were applied to DAL TFTs and a‐Si TFTs. The threshold voltage shift of DAL TFTs and a‐Si TFTs during 10,000 second stress is 0.3V and 2V, respectively. DAL TFTs were more reliable than a‐Si TFTs.