Taeyong Eom

(In,Sn)2O3∕TiO2∕Pt Schottky-type diode switch for the TiO2 resistive switching memory array

A Schottky-type diode switch consisting of a Pt∕(In,Sn)2O3∕TiO2∕Pt stack was fabricated for applications to cross-bar type resistive-switching memory arrays. The high (0.55eV) and low potential barrier at the TiO2∕Pt and TiO2∕(In,Sn)2O3 junctions, respectively, constitute the rectifying properties of the stacked structure. The forward/reverse current ratio was as high as ∼1.6×104 at an applied voltage of ∼1V. When Pt∕TiO2∕Pt memory was connected to this diode in series, there was an insignificant interference on the memory function from the diode under the forward bias and virtually no resistive switching under a reverse bias.

Phase change memory cell using Ge2Sb2Te5 and softly broken-down TiO2 films for multilevel operation

A phase change memory cell was fabricated by stacking plasma-enhanced cyclic chemical-vapor-deposited Ge2Sb2Te5 (GST) and atomic layer deposited TiO2 thin films. Different pairs of resistance states were obtained by controlling the current flow, which can be used to achieve higher memory density by multilevel operation. The multiresistance states of the stacked cell were explained by the resistance switching phenomena of TiO2 and the thermoelectric phase change properties of GST. The phase change characteristics of GST could be altered by controlling the degree of filament formation in the TiO2 layer, which eventually changed the phase change volume in the GST.

Ge2Sb2Te5 Charge Trapping Nanoislands with High-k Blocking Oxides for Charge Trap Memory

Charge trap memory capacitors using Ge 2 Sb 2 Te 5 (GST) nanoislands as charge storage media were fabricated. The GST nanoislands were prepared by plasma-enhanced cyclic chemical vapor deposition on a 6 nm thick tunneling SiO 2 layer. A 16 nm thick A1 2 O 3 or 40 nm thick HfO 2 film was used as the blocking oxide (BO). A shift in the flatband voltage in the capacitance-voltage test was achieved when the GST nanoislands were interposed between the SiO 2 and BOs, highlighting the feasibility of memory applications. The charges were trapped at the interface between the GST and BOs. Stable charge retention up to 10 4 s was observed.

Chemical interaction and ligand exchange between a [(CH3)3Si]3Sb precursor and atomic layer deposited Sb2Te3 films

The chemical interaction between the [(CH3)3Si]3Sb precursor and atomic layer deposited Sb2Te3 thin films was examined at temperatures ranging from 70 to 220 °C. The trimethylsilyl group [(CH3)3Si] displays greater affinity for Te than for Sb, and this drives replacement of Te in the film with Sb from the [(CH3)3Si]3Sb precursor, while eliminating volatile [(CH3)3Si]2Te, especially at elevated temperatures. The compositions of the resulting Sb–Te layers lie on the Sb2Te3–Sb tie line. The incorporation behavior of [(CH3)3Si]3Sb was explained in terms of a Lewis acid–base reaction. The exchange reactions occurred to relieve the unfavorable hard–soft Lewis acid–base pair between the trimethylsilyl group and Sb in [(CH3)3Si]3Sb. Such a reaction could be usefully adopted to control the chemical composition of ternary Ge–Sb–Te thin films.