Tai-Chin Lo

Simulation and Analysis of Silicon Electro-optic Modulators Utilizing the Carrier-dispersion Effect and Impact-ionization Mechanism

A new type of Si guided‐wave electro‐optic modulator is proposed and analyzed. The modulator makes use of the impact‐ionization mechanism for carrier generation, and the carrier‐dispersion effect for electro‐optic conversion. Both electrical and wave propagation properties of the modulator were examined by a two‐dimensional device simulator and a three‐dimensional waveguide simulator, respectively. Numerical estimates of phase modulation due to refractive‐index change and intensity modulation due to optical absorption and radiation loss were obtained. One of important features of the prospected modulator is speed. The simulated turn‐on and turn‐off time of the modulator was less than 1 ns. GHz modulation is, therefore, possible for this class of modulators with device structure and doping profiles optimized for fiber coupling.

Emitter-ballasting-resistor-free SiGe microwave power heterojunction bipolar transistor

The emitter ballasting resistor is used to equalize the current distribution between the emitter stripes in power transistor, but it will degrade the output power, power gain, and power added efficiency. Experimental results indicate that the current gain of uniform-base SiGe heterojunction bipolar transistors (HBTs) decreases with the increase of the temperature above 160 K, so the current distribution is equalized by itself to some extent. Therefore, the microwave power SiGe HBTs without emitter ballasting resistor were fabricated for the first time, and the continuous output power of 5 W and power added efficiency of 63% were obtained under Class C operation at a frequency of 900 MHz. Hence, the emitter current density of the SiGe HBTs with emitter width of 6 /spl mu/m is 0.79 A/cm.

High-quality n-Si/i-p+-i SiGe/n-Si structure grown by ultra high vacuum chemical molecular epitaxy

The n-Si/i-p+-i SiGe/n-Si structure was grown by ultra high vacuum chemical molecular epitaxy, and analysed by high resolution X-ray diffraction, cross-sectional transmission electron microscopy, and secondary ion mass spectroscopy. A high-quality SiGe base layer with an abrupt interface to the Si was obtained. No defects were observed in the n-Si/i-p+-i SiGe/n-Si structure. Both the Ge and boron atoms are uniformly distributed in the p+-SiGe layer, and the changes of profile of both boron and Ge atoms are abrupt from the n-Si to the SiGe layer. A high-performance microwave power SiGe heterojunction bipolar transistor (HBT) was made from the n-Si/i-p+-i SiGe/n-Si structure. Therefore, device-quality n-Si/i-p+-i SiGe/n-Si structures can be grown by ultra high vacuum chemical molecular epitaxy.

n-Si/i-p-i SiGe/n-Si structure for SiGe microwave power heterojunction bipolar transistor grown by ultra-high-vacuum chemical molecular epitaxy

The n-Si/i-p-i SiGe/n-Si structure, grown by ultra-high-vacuum chemical molecular epitaxy, was analyzed by cross-sectional transmission electron microscopy and secondary ion mass spectroscopy. It is shown that no defects are observed in the n-Si/i-p-i SiGe/n-Si structure, the interfaces between the SiGe layer and the n-Si layers are clear and planar, both the Ge and boron atoms are uniformly distributed in the p-SiGe, and the profiles of boron and Ge are abrupt from the n-Si to the SiGe layer. A high-performance microwave power SiGe heterojunction bipolar transistor was fabricated using the n-Si/i-p-i SiGe/n-Si structure. Therefore, ultra-high-vacuum chemical molecular epitaxy is one of the most promising methods for the growth of the Si/SiGe strained epilayers.

Cross-Sectional Transmission Electron Microscopy Study of Si/SiGe Heterojunction Bipolar Transistor Structure Grown by Ultra-High Vacuum Chemical Vapor Deposition

Si/SiGe heterojunction bipolar transistor (HBT) structure, grown by ultra-high vacuum chemical vapor deposition (UHVCVD), was investigated with cross-sectional transmission electron microscopy (XTEM). It was determined that a very thin layer exists in the strained SiGe layer grown on Si, which is in parallel to the interface of SiGe and Si, and the position of thin layer changes with the intrinsic SiGe spacer width but not with the Ge content in the strained SiGe base layer. The base collector junction turn-on voltage of the HBT decreases from ~0.6 V to ~0.2 V when the spacer width decreases from 100 A to 75 A, and increases from ~0.2 V to ~0.4 V when the Ge content in the strained SiGe base layer decreases from 16% to 10%. A possible explanation for this phenomenon is that the Ge atom accumulates to form a very thin Ge-rich layer.

Characterization of SiGe base layer in Si/SiGe heterojunction bipolar transistor layer structure

Abstract Si/SiGe heterojunction bipolar transistor (HBT) layer structures, grown by ultra high vacuum chemical vapor deposition (UHVCVD), were investigated by high resolution X-ray diffraction (HRXRD) and cross-sectional transmission electron microscopy (XTEM). The SiGe base layer thickness in the Si/SiGe HBT structure is determined by HRXRD and confirmed by XTEM. HRXRD indicates that the high quality SiGe base layer and abrupt interfaces between Si and SiGe were obtained. The Ge content in the SiGe base layer, determined by HRXRD, is 16% for sample #a and #b and 10% for sample #c. XTEM shows no defects in both the strained SiGe base layer and the HBT structure. Mesa-type Si/SiGe HBT was fabricated and ideal base current over several orders was obtained.

On the intrinsic spacer layer in Si/SiGe heterojunction bipolar transistor grown by ultra high vacuum chemical vapor deposition

In this paper, we report the study on the intrinsic SiGe spacer layer in Si/SiGe HBT and a novel phenomenon in Si/SiGe HBT layer structure grown by ultra high vacuum chemical vapor deposition (UHVCVD) using Si/sub 2/H/sub 6/ and GeH/sub 4/. When intrinsic SiGe spacer layer width decreases from 100 A to 75 A, the BC junction turn-on voltage decreases from /spl sim/0.6 V to /spl sim/0.2 V, while the BE junction turn-on voltage remains /spl sim/0.6 V. As a result, the offset voltage of the HBT operated at common emitter configuration increases from nearly zero to /spl sim/0.4 V. Therefore, 100 A is used as the intrinsic SiGe spacer layer width. Furthermore, the Si/SiGe HBT layer structures with different SiGe spacer layer widths grown by UHVCVD were investigated by cross-sectional transmission electron microscopy (XTEM). It is shown that a Ge-rich very thin layer exists in the strained SiGe layer grown on Si, which is in parallel with the interface of SiGe and Si. When the SiGe spacer layer width decreases from 100 A to 75 A, the Ge-rich thin layer moves closer to the interface of SiGe base and Si collector, and makes the BC junction turn-on voltage decrease, the offset voltage of HBT, therefore, increases.

900 MHz 7.4 W SiGe heterojunction bipolar transistor

The SiGe heterojunction bipolar transistor (HBT) suitable for microwave power applications was fabricated by a simple planar process compatible with Si process. The current gain of the SiGe HBT is 70, and the breakdown voltages of the collector junction and emitter junction are about 28 V and 5 V respectively. In common emitter configuration and class C operation, the SiGe HBT with continuous wave output power of 7.4 W and power added efficiency of 53% and power gain of 8.7 dB was obtained at the frequency of 900 MHz. Hence, the emitter current linear density of the SiGe HBT with emitter region width of 6 /spl mu/m is 1.7 A/cm.

0.2 /spl mu/m LDD NMOSFETs fabricated by conventional optical lithography

To improve the performance and reliability of deep sub micron MOSFETs, we propose an innovative non-planar LDD structure which can be fabricated by conventional optical lithography and plasma etching without using e-beam lithography. The proposed structure overcomes the trade-off between short channel effects and hot carrier effects which are most important in deep sub-micron devices, and retains the high current driving ability.

Self-planarized deep trench process for self-aligned nitride bipolar device isolation

The self-planarization of deep trench with 2 micron thick field oxidation has been developed for self-aligned nitride bipolar integrated circuit fabrication. Trenches with geometry of 2 /spl mu/m wide by 8 /spl mu/m deep were achieved by anisotropic etching for isolating global buried collectors. They were then filled and planarized simply by a local oxidation of silicon (LOCOS) without polysilicon re-filling or etching back, while maintained a collector-to-collector leakage of 5 /spl mu/a at 15 V. As proof-of-technology, arrays of trench-isolated bipolar transistors with cut-off frequency of 14 GHz were gold-metallized without extra planarization of the trench.