Takashi Kohno

Effects of delayed visual information on the rate and amount of prism adaptation in the human

Accurate reaching towards a visual target is initially disturbed when the visual field is displaced by prisms, but recovers with successive trials. To determine how the improvement depends on the visual error signals associated with the motor output, the time course of prism adaptation was studied with delayed visual information on the error. Subjects were trained to reach rapidly at a target on a tangent screen. Vision was always blocked during the movement, and allowed again only after the index finger touched the screen. One experiment consisted of three sets of 30 trials. In the first set, the subject wore no prisms and vision was allowed without delay. In the second, the visual field was displaced by prisms, and vision was available only after a delay period of 0–10,000 msec while the subjects maintained their final pointing position. Initially, the subject misreached the target by about the amount of visual displacement (60 mm). Errors decreased with trials by an amount proportional to the error in the preceding trial. The rate of decrease of error was generally largest when the delay was 0 msec, became significantly smaller when the delay was 50 msec, and showed only gradual change with longer delays. In the third set, the subject wore no prisms and vision was allowed without delay. Initial misreaching in the direction opposite to the visual displacement, reflecting the amount of adaptation in the second set, was generally largest with no delay (median of 46 mm) and significantly smaller with 50 msec and longer delays (17–33 mm).(ABSTRACT TRUNCATED AT 250 WORDS)

A MOSFET-based model of a class 2 nerve membrane

We have constructed a nerve membrane using MOSFET circuitry, which can be a basic element of an FET-based neural system. Its mechanism of action potentials generation is designed to reproduce that of the Hodgkin-Huxley equations. The responses to singlet, doublet, repetitive pulse, and sustained stimuli are analyzed to show that it exhibits similar properties to the Hodgkin-Huxley equations; namely, 1) excitable dynamics with generation of action potentials, 2) the existence of a chaotic response to periodic stimuli, and 3) Class 2 excitability. It is known that Class 2 excitability is generated by an inverted Hopf bifurcation. We have applied Hopf bifurcation theory to our nerve membranes system equations and have shown a routine for ascertaining whether a certain parameter set generates an inverted Hopf bifurcation.

An FPGA-based silicon neuronal network with selectable excitability silicon neurons

This paper presents a digital silicon neuronal network which simulates the nerve system in creatures and has the ability to execute intelligent tasks, such as associative memory. Two essential elements, the mathematical-structure-based digital spiking silicon neuron (DSSN) and the transmitter release based silicon synapse, allow us to tune the excitability of silicon neurons and are computationally efficient for hardware implementation. We adopt mixed pipeline and parallel structure and shift operations to design a sufficient large and complex network without excessive hardware resource cost. The network with 256 full-connected neurons is built on a Digilent Atlys board equipped with a Xilinx Spartan-6 LX45 FPGA. Besides, a memory control block and USB control block are designed to accomplish the task of data communication between the network and the host PC. This paper also describes the mechanism of associative memory performed in the silicon neuronal network. The network is capable of retrieving stored patterns if the inputs contain enough information of them. The retrieving probability increases with the similarity between the input and the stored pattern increasing. Synchronization of neurons is observed when the successful stored pattern retrieval occurs.

Mathematical-model-based design of silicon burst neurons

Conventionally, silicon neurons have been designed based on two major principles, namely phenomenological and conductance-based principles. In previous studies [T. Kohno, K. Aihara, Parameter tuning of a MOSFET-based nerve membrane, in: Proceedings of the 10th International Symposium on Artificial Life and Robotics 2005, 2005, pp. 91-94; T. Kohno, K. Aihara, A MOSFET-based model of a Class 2 Nerve membrane, IEEE Trans. Neural Networks 16 (3) (2005) 754-773; T. Kohno, K. Aihara, Bottom-up design of Class 2 silicon nerve membrane, J. Intell. Fuzzy Syst., in press], we proposed a mathematical-model-based design principle that is based on phase plane and bifurcation analyses. It reproduces the mathematical structures of biological neuron models, thus making the silicon neurons simple and biologically realistic. In this study, we demonstrate that square-wave and another type of silicon bursters can be constructed by adding simple circuitries and tuning the system parameters for the silicon nerve membrane designed in our previous studies. Our simple square-wave burster exhibits various firing patterns, including chaotic spiking and bursting.

A two-variable silicon neuron circuit based on the Izhikevich model

The silicon neuron is an analog electronic circuit that reproduces the dynamics of a neuron. It is a useful element for artificial neural networks that work in real time. Silicon neuron circuits have to be simple, and at the same time they must be able to realize rich neuronal dynamics in order to reproduce the various activities of neural networks with compact, low-power consumption, and an easy-to-configure circuit. We have been developing a silicon neuron circuit based on the Izhikevich model, which has rich dynamics in spite of its simplicity. In our previous work, we proposed a simple silicon neuron circuit with low power consumption by reconstructing the mathematical structure in the Izhikevich model using an analog electronic circuit. In this article, we propose an improved circuit in which all of the MOSFETs are operated in the sub-threshold region.

Silicon neuron: digital hardware implementation of the quartic model

AbstractThis paper presents an FPGA implementation of the quartic neuron model. This approach uses digital computation to emulate individual neuron behavior. We implemented the neuron model using fixed-point arithmetic operation. The neuron model’s computations are performed in arithmetic pipelines. It was designed in VHDL language and simulated prior to mapping in the FPGA. We show that the proposed FPGA implementation of the quartic neuron model can emulate the electrophysiological activities in various types of cortical neurons and is capable of producing a variety of different behaviors, with diversity similar to that of neuronal cells. The neuron family of this digital neuron can be modified by appropriately adjusting the neuron model’s parameters.n

Simple Cortical and Thalamic Neuron Models for Digital Arithmetic Circuit Implementation

Trade-off between reproducibility of neuronal activities and computational efficiency is one of crucial subjects in computational neuroscience and neuromorphic engineering. A wide variety of neuronal models have been studied from different viewpoints. The digital spiking silicon neuron (DSSN) model is a qualitative model that focuses on efficient implementation by digital arithmetic circuits. We expanded the DSSN model and found appropriate parameter sets with which it reproduces the dynamical behaviors of the ionic-conductance models of four classes of cortical and thalamic neurons. We first developed a four-variable model by reducing the number of variables in the ionic-conductance models and elucidated its mathematical structures using bifurcation analysis. Then, expanded DSSN models were constructed that reproduce these mathematical structures and capture the characteristic behavior of each neuron class. We confirmed that statistics of the neuronal spike sequences are similar in the DSSN and the ionic-conductance models. Computational cost of the DSSN model is larger than that of the recent sophisticated Integrate-and-Fire-based models, but smaller than the ionic-conductance models. This model is intended to provide another meeting point for above trade-off that satisfies the demand for large-scale neuronal network simulation with closer-to-biology models.

A qualitative-modeling-based low-power silicon nerve membrane

The silicon neuronal network is an electronic circuit system that reproduces the electrophysiological activities of the nervous system in real-time or faster, which is composed of silicon neuron circuits connected via silicon synapse circuits. It is a candidate for the next-generation computing platform because it is expected to realize the low-power, autonomous, and intelligent information processing similar to the brain. The dynamical property of silicon neuron circuits is a most important factor for information processing in the silicon neuronal networks. In many silicon neuron circuits, however, their spike generation dynamics is drastically approximated by resetting of the state variables. We have developed a silicon nerve membrane circuit which is free of this approximation and configurable to Class I and II in the Hodgkins classification after fabrication. By using mathematical techniques in the qualitative neuronal modeling, we accomplished low-power consumption around 3 nW, which is comparable to the leading-edge silicon neuron circuits. It was designed for TSMC 0.25μm CMOS process and all the transistors are in their subthreshold domain. In this article, its simulation results by Spectre software are reported.

A Design Method for Analog and Digital Silicon Neurons ???‐Mathematical‐Model‐Based Method‐

Silicon neuron is electrical circuit that is analogous to biological neurons. Conventionally, it was designed mainly in the following two attitudes. One is to realize circuitry that is as close to biological neuron as possible, which enlarges circuit size and complexity terribly. Another is to realize simple and compact circuitry that can be utilized to construct large‐scale silicon neural network. Because designers ignore the mechanisms underlying the neuronal phenomena, silicon neurons can be quite different from biological ones. We proposed a new design method that utilizes mathematical knowledge on neuronal phenomena, which allows us to design simple circuitry whose operating mechanism is same as biological neuron. Several types of circuits have been and are being implemented to validate its efficiency.

Qualitative-Modeling-Based Silicon Neurons and Their Networks.

The ionic conductance models of neuronal cells can finely reproduce a wide variety of complex neuronal activities. However, the complexity of these models has prompted the development of qualitative neuron models. They are described by differential equations with a reduced number of variables and their low-dimensional polynomials, which retain the core mathematical structures. Such simple models form the foundation of a bottom-up approach in computational and theoretical neuroscience. We proposed a qualitative-modeling-based approach for designing silicon neuron circuits, in which the mathematical structures in the polynomial-based qualitative models are reproduced by differential equations with silicon-native expressions. This approach can realize low-power-consuming circuits that can be configured to realize various classes of neuronal cells. In this article, our qualitative-modeling-based silicon neuron circuits for analog and digital implementations are quickly reviewed. One of our CMOS analog silicon neuron circuits can realize a variety of neuronal activities with a power consumption less than 72 nW. The square-wave bursting mode of this circuit is explained. Another circuit can realize Class I and II neuronal activities with about 3 nW. Our digital silicon neuron circuit can also realize these classes. An auto-associative memory realized on an all-to-all connected network of these silicon neurons is also reviewed, in which the neuron class plays important roles in its performance.