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international electronics manufacturing technology symposium | 1998

Reliability of soldered joints in CSPs of various designs and mounting conditions

Masato Sumikawa; Yasuyuki Saza; Tomotoshi Sato; Chiyoshi Yoshioka; Akiteru Rai; Takashi Nukii

The chip size package (CSP) is in use in various portable electronic products. Further evaluation of the reliability of its soldered joints is required all the more because these soldered joints are invisible. This study focuses on the thermal fatigue life of soldered joints in the CSP. CSPs were mounted on printed circuit boards (PCBs) in various configurations and mounting conditions, and underwent thermal cycle testing. Then, the fatigue lives of their soldered joints were compared. As a result, the following two facts became apparent. Firstly, reflowing at a 210/spl deg/C peak tends to result in failures that may be derived from poor wetting between solder and pad, in cases where the CSP is mounted on a nickel and gold plated pad. Secondly, the solder joint size has a great influence on its fatigue life. The larger the solder joints that were made, the longer fatigue life they indicated. A finite element method (FEM) analysis of these mounted structures was also executed. The viscoplastic (creep and plastic) properties of solder were evaluated to compute the equivalent inelastic strain occurring in the joints. A parameter in the Coffin-Manson equation is obtained from the computed inelastic strain amplitudes and the experimentally obtained fatigue lives. This result enables us to estimate the fatigue life of CSP solder joints without actual tests.


Journal of Japan Institute of Electronics Packaging | 1998

The Rework Process Technology and Reliability Evaluation for CSP

Tomotoshi Sato; Takashi Nukii; Akiteru Rai

It is expected that CSPs accept a demand of high dencity assembly in mobile tele-communication apparatus etc. We revealed that conventional process using CSP is compatible with that using SMD. We developed newly CSP repairing process that has following 4 steps; removing defective CSP with IR lanp, uniforming solder residue, mounting transferred solder paste CSP and reflow-solderring with IR lanp. We carried out the reliability tests on the samples that CSPs were assembled by conventional process and rework process, and have got the good result in practical use on both samples. FEM simulation of assembled CSP structure using elasto-plastic model was computed. The simulation result gets almost agreement with the CSP reliability test, and has a particular behavior in comparison with DCA (Direct Chip Attach) . We will continue CSP reliability data accumulation and FEM study for prediction on life time of CSP assembly apparatus.


Archive | 1987

Method of making a hybrid semiconductor device

Akiteru Rai; Keiji Yamamura; Takashi Nukii


Archive | 1989

Connection construction and method of manufacturing the same

Yasunobu Tagusa; Hiroshi Matsubara; Takashi Nukii


Archive | 1990

METHOD FOR CONNECTING CIRCUIT BOARDS

Hiroshi Matsubara; Takashi Nukii


Archive | 1992

Method for mounting a semiconductor device

Keiji Yamamura; Takashi Nukii


Archive | 1989

A semiconductor device and a process for manufacturing thereof.

Keiji Yamamura; Akiteru Rai; Takashi Nukii


Archive | 1987

Method of making a semiconductor device comprising at least two semiconductor chips

Akiteru Rai; Keiji Yamamura; Takashi Nukii


Archive | 1988

Terminal electrode structure of a liquid crystal panel display

Keiji Yamamura; Takashi Nukii; Shigeo Nakabu


Archive | 1988

A contact-type image sensor

Masataka Itoh; Atsushi Yoshinouchi; Satoshi Nishigaki; Takashi Nukii; Shuhei Tsuchimoto

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Shuhei Tsuchimoto

National Archives and Records Administration

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Masato Sumikawa

National Archives and Records Administration

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