Is this you? Create Your Porfile
Avatar

Takuya Yasui

Panasonic

Network

Latest external collaboration on country level. Dive into details by clicking on the dots.

Explore More

Hotspot

Dive into the research topics where Takuya Yasui is active.

Explore More

Publication

Featured researches published by Takuya Yasui.

Archive | 2000

Clock circuit and method of designing the same

Takuya Yasui; Keiichi Kurokawa; Masahiko Toyonaga; Atsushi Takahashi; Yoji Kajitani

Archive | 2005

Automatic layout method of semiconductor integrated circuit

Keiichi Kurokawa; Takuya Yasui

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences | 2001

A Practical Clock Tree Synthesis for Semi-Synchronous Circuits

Keiichi Kurokawa; Takuya Yasui; Masahiko Toyonaga; Atsushi Takahashi

Archive | 2007

Semiconductor device and semiconductor device layout designing method

Junichi Shimada; Fumihiro Kimura; Yoichi Matsumura; Takako Ohashi; Nobuyuki Iwauchi; Takeya Fujino; Takayuki Araki; Yukiji Hashimoto; Takuya Yasui; Hirofumi Taguchi

Archive | 2007

Method for designing semiconductor integrated circuits having air gaps.

Tsutomu Fujii; Hirofumi Miyashita; Hiromasa Fukazawa; Tatsuo Gou; Takuya Yasui

Archive | 2008

WIRING STRUCTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE, AND METHOD AND DEVICE FOR DESIGNING THE SAME

Takayuki Araki; Junichi Shimada; Hirokazu Ogawa; Kazuhiko Fujimoto; Tsutomu Fujii; Takuya Yasui

Archive | 2007

METHOD AND PROGRAM FOR DESIGNING SEMICONDUCTOR INTEGRATED CIRCUIT, METHOD AND PROGRAM FOR SUPPORTING DESIGN OF SEMICONDUCTOR INTEGRATED CIRCUIT, AND METHOD AND PROGRAM FOR CALCULATING WIRING PARASITIC CAPACITANCE

Tsutomu Fujii; Hirofumi Miyashita; Hiromasa Fukazawa; Tatsuo Gou; Takuya Yasui

Archive | 2006

Semiconductor device and layout design method of semiconductor device

Akiyuki Araki; Kenya Fujino; Koji Hashimoto; Noriyuki Iwauchi; Fumihiro Kimura; Yoichi Matsumura; Takako Ohashi; Junichi Shimada; Hirofumi Taguchi; Takuya Yasui; 貴子 大橋; 卓也 安井; 宣之 岩内; 純一 嶋田; 文浩 木村; 陽一 松村; 幸治 橋本; 浩文 田口; 章之 荒木; 健哉 藤野

Archive | 2007

WIRING STRUCTURE FOR SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE, DESIGNING METHOD AND DESIGNING APPARATUS THEREOF

Akiyuki Araki; Tsutomu Fujii; Kazuhiko Fujimoto; Hirokazu Ogawa; Junichi Shimada; Takuya Yasui; 卓也 安井; 広和 尾川; 純一 嶋田; 章之 荒木; 力 藤井; 和彦 藤本

Archive | 2002

Delay analysis method and design assist apparatus of semiconductor circuit

Keiichi Kurokawa; Masahiko Toyonaga; Takuya Yasui

Explore More

Collaboration

Dive into the Takuya Yasui's collaboration.

Top Co-Authors
Avatar

Keiichi Kurokawa

Panasonic

View shared research outputs
Top Co-Authors
Avatar

Junichi Shimada

Panasonic

View shared research outputs
Top Co-Authors
Avatar

Tsutomu Fujii

Panasonic

View shared research outputs
Top Co-Authors
Avatar

Atsushi Takahashi

Osaka University

View shared research outputs
Top Co-Authors
Avatar

Fumihiro Kimura

Panasonic

View shared research outputs
Top Co-Authors
Avatar

Hirofumi Miyashita

Panasonic

View shared research outputs
Top Co-Authors
Avatar

Hirofumi Taguchi

Panasonic

View shared research outputs
Top Co-Authors
Avatar

Hiromasa Fukazawa

Panasonic

View shared research outputs
Top Co-Authors
Avatar

Takako Ohashi

Panasonic

View shared research outputs
Top Co-Authors
Avatar

Takayuki Araki

Panasonic

View shared research outputs
Explore More
Researchain Logo
Decentralizing Knowledge