Tamio Saito

An approach to determining an equivalent circuit for HEMTs

A simple way to determine a small-signal equivalent circuit of High Electron Mobility Transistors (HEMTs) is proposed. Intrinsic elements determined by a conventional analytical parameter transformation technique are described as functions of extrinsic elements. Assuming that the equivalent circuit composed of lumped elements is valid over the whole frequency range of the measurements, the extrinsic elements are iteratively determined using the variance of the intrinsic elements as an optimization criterion. Measurements of S-parameters up to 62.5 GHz at more than 100 different bias points confirmed that the HEMT equivalent circuit is consistent for all bias points. >

An FM-CW radar module with front-end switching heterodyne receiver

The authors have developed a 60-GHz FM-continuous wave (CW) radar module that generates sidebands by switching a high electron mobility transistor (HEMT) front-end. The module also uses heterodyne detection for FM-AM conversion noise reduction. The modules signal to noise ratio was 20 dB better than a previously designed homodyne FM-CW radar module.<<ETX>>

A 5Gb/s transceiver with an ADC-based feedforward CDR and CMA adaptive equalizer in 65nm CMOS

A high bandwidth and a robust performance are demanded in the consumer market applications. An ADC-based transceiver satisfies these demands and enables power/area scaling with process [1,2]. We developed and tested a spread-spectrum-clocking (SSC) compliant 5-Gb/s transceiver in 65-nm CMOS. The receiver uses an ADC-based front-end that samples the incoming signal without adjusting the phase relation between the sampling clock and the signal, hence eliminating the need for phase control of the sampling clock (Fig. 8.7.1). The phase tracking of the incoming signal and the data decision are performed entirely in the numerical domain without generating physical sampling-clock phases. An adaptive digital FFE (feed-forward equalizer) compensates for a channel loss up to 15dB at 2.5 GHz, using an on-chip adaptation controller based on CMA (constant-modulus algorithm). The CDR operated with BER less than 1E-12 when the transmitter and receiver clock signals were independently SSC-modulated at a modulation frequency of 30 kHz with a frequency deviation of 0 to −5000ppm.

60-GHz transceiver for high-speed wireless LAN system

We have developed a 60-GHz Transceiver unit for high-capacity wireless LAN systems, employing state-of-the-art MMIC technology. This prototype showed sufficiently good performance in an ethernet-compatible 10-Mbps random access CSMA/CD wireless system, and proved its potential usefulness in various commercial products.

Direct growth of CdTe on (100), (211), and (111) Si by metalorganic chemical vapor deposition

CdTe epilayers were grown directly on (100), (211), and (111) silicon substrates by metalorganic chemical vapor deposition (MOCVD). The crystallinity and the growth orientation of the CdTe film were dependent on the surface treatment of the Si substrate. The surface treatment consisted of exposure of the Si surface to diethyltelluride (DETe) at temperatures over 600°C prior to CdTe growth. Direct growth of CdTe on (100) Si produced polycrystalline films whereas (lll)B single crystals grew when Si was exposed to DETe prior to CdTe growth. On (211) Si, single crystal films with (133)A orientation was obtained when grown directly; but produced films with (211)A orientation when the Si surface was exposed to DETe. On the other hand, only (lll)A CdTe films were possible on (111) Si, both with and without Te source exposure, although twinning was increased after exposure. The results indicate that the exposure to a Te-source changes the initial growth stage significantly, except for the growth on (111) Si. We propose a model in which a Te atom replaces a Si atom that is bound to two Si atoms.

60-GHz MMIC image-rejection downconverter using InGaP/InGaAs HEMT

We have designed, fabricated, and evaluated an InGaP/InGaAs/GaAs HEMT 60-GHz monolithic image-rejection downconverter. The downconverter consists of a four-stage low-noise amplifier and a single-balanced image-rejection active-drain mixer. The HEMTs used in the downconverter have gates of 0.1 /spl mu/m long and 100 /spl mu/m wide. The downconverter has a maximum conversion gain of 22.9 dB at 61 GHz and a minimum noise figure of 3.16 dB at 58.5 GHz with 5 dBm LO power input and 140 MHz IF output. These characteristics are, to our knowledge, the best report of an MMIC downconverter using an image-rejection active-drain mixer in this frequency range. This is a significant improvement from our previous report results in terms of the noise figure and conversion gain.

Growth of (111) HgCdTe on (100) Si by MOVPE using metalorganic tellurium adsorption and annealing

Abstract(lll)B CdTe layers free of antiphase domains and twins were directly grown on (100) Si 4°-misoriented toward<011> substrates, using a metalorganic tellurium (Te) adsorption and annealing technique. Direct growth of (lll)B CdTe on (100) Si has three major problems: the etching of Si by Te, antiphase domains, and twinning. Te adsorption at low temperature avoids the etching effect and annealing at a high temperature grows single domain CdTe layers. Te atoms on the Si surface are arranged in two stable positions, depending on annealing temperatures. We evaluated the characteristics of (lll)B CdTe and (lll)B HgCdTe layers. The full width at half maximum (FWHM) of the x-ray double crystal rocking curve (DCRC) showed 146 arc sec at the 8 |im thick CdTe layers. In Hg1−xCdxJe (x = 0.22 to 0.24) layers, the FWHMs of the DCRCs were 127 arc sec for a 7 (im thick layer and 119 arc sec for a 17 (im thick layer. The etch pit densities of the HgCdTe were 2.3 x 106 cm2 at 7 ^m and 1.5 x 106 cm-2 at 17 um.

60-GHz monolithic oscillator using InGaP/InGaAs/GaAs HEMT technology

Using 0.11-/spl mu/m InGaP/InGaAs/GaAs pseudomorphic HEMT technology, we have developed a 60 GHz buffered free-running monolithic oscillator which has an output power of 9.1 dBm at 59.7 GHz and a phase noise of -60 dBc/Hz at 100 kHz from the carrier frequency. We operated the oscillators HEMT in a reverse channel configuration and introduced an empirical nonlinear HEMT model for the configuration.<<ETX>>

VIII ratio dependence of surface macrodefects in CdTe/ZnTe/GaAs(100) growth by metalorganic vapor phase epitaxy

We studied the surface morphology of CdTe(100) layers on GaAs(100) by metalorganic vapor phase epitaxy (MOVPE). When CdTe(100) layers were obtained using thin ZnTe nucleation layers, we observed high-density pyramidal macrodefects, known as hillocks, in the epilayer surface. We found the density of hillocks to be strongly dependent on the VIII ratio during both ZnTe and CdTe growth processes. We optimized both the TeZn and TeCd ratios to obtain a minimum hillock density of 1 × 102 cm−2. These results show that hillocks were nucleated at both the epilayer/substrate and CdTeZnTe interfaces. By X-ray diffraction measurement, we confirmed that the quality of the crystal structural was also good under this condition. We also found the initial nucleation conditions to be more important for the structural quality. In (100)HgCdTe/CdTe/GaAs growth, pyramidal hillocks on the CdTe buffer surface caused substantial (> 100 μm) macrodefects in HgCdTe layers, which were fatal for infrared devices. Their shape was enlarged especially in one direction. To achieve a low density of surface macrodefects in HgCdTe(100) or CdTe(100) layers on GaAs(100) substrates, we need to precisely control the VIII ratio.

Dislocation profiles in HgCdTe(100) on GaAs(100) grown by metalorganic chemical vapor deposition

We studied dislocation etch pit density (EPD) profiles in HgCdTe(lOO) layers grown on GaAs(lOO) by metalorganic chemical vapor deposition. Dislocation profiles in HgCdTe(lll)B and HgCdTe(lOO) layers differ as follows: Misfit dislocations in HgCdTe(lll)B layers are concentrated near the HgCdTe/CdTe interfaces because of slip planes parallel to the interfaces. Away from the HgCdTe/CdTe interface, the HgCdTe(111)B dislocation density remains almost constant. In HgCdTe(lOO) layers, however, the dislocations propagate monotonically to the surface and the dislocation density decreases gradually as dislocations are incorporated with increasing HgCdTe(lOO) layer thicknesses. The dislocation reduction was small in HgCdTe(lOO) layers more than 10 μm from the HgCdTe/CdTe interface. The CdTe(lOO) buffer thickness and dislocation density were similarly related. Since dislocations glide to accommodate the lattice distortion and this movement increases the probability of dislocation incorporation, incorporation proceeds in limited regions from each interface where the lattice distortion and strain are sufficient. We obtained the minimum EPD in HgCdTe(100) of 1 to 3 x 106 cm-2 by growing both the epitaxial layers more than 8 μm thick.