Tanamoto Tetsufumi
Toshiba
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Publication
Featured researches published by Tanamoto Tetsufumi.
symposium on vlsi circuits | 2014
Hiroki Noguchi; Kazutaka Ikegami; Naoharu Shimomura; Tanamoto Tetsufumi; Junichi Ito; Shinobu Fujita
This paper presents a novel nonvolatile last level cache (LLC) based on the advanced perpendicular STT-MRAM to reduce the total power consumption of LLC. The presented LLC has novel readout circuit with the dual-sensing salvation scheme that enhances reliability of STT-MRAM along with typical error-correcting code (ECC). The comparison of CPU performance per power with SRAM-based, embedded DRAM and conventional STT-MRAM-based LLCs indicates that the presented novel nonvolatile LLC is the most suitable for large LLC.
Archive | 2015
Tanamoto Tetsufumi; Yasuda Shinichi; Fujita Shinobu
Archive | 2008
Tanamoto Tetsufumi; Yasuda Shinichi; Fujita Shinobu
Archive | 2016
Chen Jiezhi; Tanamoto Tetsufumi; Mitani Yuichiro
Archive | 2016
Tanamoto Tetsufumi; Yasuda Shinichi; Fujita Shinobu
Archive | 2015
Noguchi Hiroki; Tanamoto Tetsufumi; Ikegami Kazutaka; Fujita Shinobu
Archive | 2014
Chen Jiezhi; Tanamoto Tetsufumi; Mitani Yuichiro; Marugame Takao
Archive | 2017
Tanamoto Tetsufumi; Fujita Shinobu
Archive | 2017
Tanamoto Tetsufumi; Fujita Shinobu
Archive | 2016
Chen Jiezhi; Mitani Yuuichiro; Tanamoto Tetsufumi; Marukame Takao
