Tatsuhiro Suzuki

Deep-Level-Transient Spectroscopy Characterization of Mobility-Limiting Traps in SiO2/SiC Interfaces on C-Face 4H-SiC

Constant-capacitance deep-level-transient spectroscopy (CCDLTS) characterization of traps (or states) in SiO2/SiC interfaces on the C-face was carried out to clarify the cause of low-channel mobility of SiC MOSFETs. CCDLTS measurements showed that the interface-state density (Dit) near the conduction band of SiO2/SiC interfaces fabricated using N2O oxidation was much higher than that of SiO2/SiC interfaces fabricated using wet oxidation. The high density of interface states near the conduction band is likely to be the main cause of the low mobility of MOSFETs fabricated using N2O oxidation.

A built-in high temperature half-bridge power module with low stray inductance and low thermal resistance for in-wheel motor application

In order to integrate a five-phase inverter system into the limited space of an in-wheel motor, a high temperature low stray　inductance SiC half-bridge power module with a volume of about 5 ml was designed, fabricated and tested. The stray inductance in the module was calculated by an electromagnetic simulator and confirmed by measurements to be 4.4 nH. Double-pulse switching tests were conducted at temperatures up to 200°C. Thermal resistance, including that of the substrate, was calculated to be 0.153 °C/W. Fast switching capability was accomplished with an external gate resistance of 1 Ω.

Negative Field Reliability of ONO Gate Dielectric on 4H-SiC

It was experimentally shown that an ONO gate dielectric carefully formed on 4H-SiC has extremely high reliability even under a negative electric field at least up to a junction temperature of 300°C, making it promising for power MOS and CMOS applications. Medium charge to failure of –30 C/cm2 was achieved for fully processed polycrystalline Si gate MONOS capacitors with an equivalent SiO2 thickness of teq = 44 nm and a 200-μm diameter. The medium time to failure of these capacitors projected for –3 MV/cm exceeds 86 and 6.3 thousand years at room temperature and 300°C, respectively. A parasitic memory action did not appear even when Eox of -6.6 MV/cm was applied for 5000 seconds.

Electromigration Reliability of the Contact Hole in SiC Power Devices Operated at Higher Junction Temperatures

It is strongly desired to operate SiC power devices at higher junction temperatures (Tj), but that often entails problems because they contain a variety of materials with thermal activity or weakness. An example of such troubles is the steep increase in resistance of the Al electrode in the source (or emitter) contact holes, caused by electromigration (EM). In this work, EM reliability of the contact hole in SiC power devices was evaluated for an improved Al electrode sandwiched between thin TaN layers. An estimated mean time to failure (MTTF) of approximately 3400 years was achieved under conditions of Tj = 300°C and J = 104 A/cm2.

Critical Reliability Issues for SiC Power MOSFETs Operated at High Temperature

This paper discusses critical reliability issues and their countermeasures for vertically structured poly-Si gate n-channel power MOSFETs (DMOS) on 4H-SiC when operated at an elevated temperature of more than 300°C for a long period of time. Two destructive failures were identified in a storage life test at 500°C: a short-circuit between the source and the gate and a disconnection at the n+ source contact. The former was caused by interlayer dielectric erosion and/or Al spearing into the poly-Si gate; the latter was caused by the disappearance of the NiSix contact layer. Effective and practical countermeasures were devised and implemented. Device lifetime against the three different failure mechanisms was improved in every case by at least one order of magnitude.

Toward a Better Understanding of Ni-Based Ohmic Contacts on SiC

There is still little consensus regarding why low contact resistivity is achieved when Ni on n-type 4H- and 6H-SiC is annealed at temperatures of more than above 950°C. The objective of this paper is to provide an answer concerning to this question. It is has been reported that even Ni-based contacts formed in the n++ region exhibited a steep reduction of contact resistivity in an annealing temperature range > 900°C. This effect reduction cannot be explained by the carbon vacancy induced donor model (Vc model) proposed by Han and his coworkers [Appl. Phys. Lett., Vol. 79, p. 1816 (2001)]. And, it is clarified that It was observed that the surface of substrates annealed at 1000°C was not covered with not Ni2Si but with a thin layer of NiSi. Finally, a plausible model is proposed that as the result of annealing at higher temperatures, results in the formation of the a NiSi/SiC system is builtat the substrate interface, resulting in significant reduction in low causing contact resistivity to be reduced significantly.

Extremely Compact Half-Bridge SiC Power Modules Built into EV In-Wheel Motor

Full SiC half-bridge power modules (HPMs) applicable to a real electric vehicle 40-kW permanent magnetic in-wheel motor with an internal diameter of 159 mm have been designed, prototyped and characterized for the first time in the NEDO-SIP program. The prototyped HPMs are extremely compact in size at D35.7×W18.8×H8.0 mm and capable of withstanding junction temperatures up to nearly 200°C. Double-pulse tests revealed that the tested HPM showed steady switching behavior even at 600 V/160 A.

High temperature reliability assessment and degradation analysis for diamond semiconductor devices

The long-term reliability of Schottky pn diodes (SPNDs) on diamond having widely used Ti/Pt/Au electrodes was investigated at 500°C in order to identify degradation phenomena at higher temperatures. A vital degradation event was observed after the passage of about 100 hours in that both forward and reverse currents were progressively reduced. AES depth profiling and X-STEM-EELS analyses revealed that this occurred because the Ti contact material changed to insulating (or semiconductive) TiO2, causing large series resistance.

Degradation Analysis of TO-247 Package SiC-MOSFETs Subjected to High Temperature Storage and Heavy Thermal Cycle Test

Abstract Three types of TO-247 package SiC-MOSFETs, denoted as A, B and C and fabricated by different manufacturers, were subjected to thermal cycle tests (TCT) ranging from −40°C to 200°C and a high temperature storage test (HTST) at 200°C in air. Their reliability was continuously investigated based on electrical characterizations, X-ray inspection and scanning acoustic tomography (SAT). Intermittent SAT observation revealed that, regardless of the device type, the epoxy resin (encapsulant) first peeled on the Cu die pad around the outer edge of the SiC power die and then peeling rapidly spread outward as the number of thermal cycles or storage time increased. The number of cycles or storage time differed depending on the device type (manufacturer). Subsequently, further peeling occurred on the SiC die and the devices failed or showed instability. The deterioration pattern tended to differ somewhat between the TCT and HTST. Uplift of the die attachment was observed for device A after thermal storage for...