Tatsurou Hiraki

High-performance silicon photonics technology for telecommunications applications

Abstract By way of a brief review of Si photonics technology, we show that significant improvements in device performance are necessary for practical telecommunications applications. In order to improve device performance in Si photonics, we have developed a Si-Ge-silica monolithic integration platform, on which compact Si-Ge–based modulators/detectors and silica-based high-performance wavelength filters are monolithically integrated. The platform features low-temperature silica film deposition, which cannot damage Si-Ge–based active devices. Using this platform, we have developed various integrated photonic devices for broadband telecommunications applications.

Si-Ge-Silica Monolithic Integration Platform and Its Application to a 22-Gb/s

We describe a Si-Ge-silica monolithic integration platform for telecommunications applications. The monolithic integration process features low-temperature silica film deposition by electron-cyclotron-resonance chemical vapor deposition to prevent thermal damage to Si/Ge active devices. The monolithically integrated Si and SiOx waveguides show propagation losses of 2.8 and 0.9 dB/cm, and the inverse-tapered spot-size converters show a coupling loss of 0.35 dB. We applied the platform to a 22-Gb/s × 16-ch wavelength-division multiplexing receiver, in which a 16-ch SiOx arrayed waveguide grating (AWG) with 1.6-nm channel separation and Ge photodiodes (PDs) are monolithically integrated. The AWG-PD device exhibits fiber-to-PD responsivity of 0.29 A/W and interchannel crosstalk of less than -22 dB and successfully receives 22-Gb/s signal for all 16 channels. In addition, we demonstrate 40-km transmission of 12.5-Gb/s signal and obtain sensitivity of -6.8 dBm at a bit error rate of 10-9 without transimpedance amplifiers.

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We proposed a compact and multiplicity-scalable mode multiplexer using three-dimensional silicon-rich silica waveguide on a silicon chip. Experimental results showed a feasibility demonstration of demultiplexing 3 modes with a chip area of -0.6 mm2.

16-ch WDM Receiver

A new structure is examined for low-voltage and low-noise Ge-based avalanche photodiodes (APDs) on Si, where a Ge/graded-SiGe heterostructure is used as the multiplication layer of a separate-absorption-carrier-multiplication structure. The Ge/SiGe heterojunction multiplication layer is theoretically shown to be useful for preferentially enhancing impact ionization for photogenerated holes injected from the Ge optical-absorption layer via the graded SiGe, reflecting the valence band discontinuity at the Ge/SiGe interface. This property is effective not only for the reduction of operation voltage/electric field strength in Ge-based APDs but also for the reduction of excess noise resulting from the ratio of the ionization coefficients between electrons and holes being far from unity. Such Ge/graded-SiGe heterostructures are successfully fabricated by ultrahigh-vacuum chemical vapor deposition. Preliminary pin diodes having a Ge/graded-SiGe multiplication layer act reasonably as photodetectors, showing a multiplication gain larger than those for diodes without the Ge/SiGe heterojunction.

Monolithically integrated mode multiplexer/de-multiplexer on three-dimensional SiOx-waveguide platform

We demonstrated a small sensitivity to temperature variations of delay-line Mach-Zehnder interferometer (DL MZI) on a Si photonics platform. The key technique is to balance a thermo-optic effect in the two arms by using waveguide made of different materials. With silicon and silicon nitride waveguides, the fabricated DL MZI with a free-spectrum range of ~40 GHz showed a wavelength shift of -2.8 pm/K with temperature variations, which is 24 times smaller than that of the conventional Si-waveguide DL MZI. We also demonstrated the decoding of the 40-Gbit/s differential phase-shift keying signals to on-off keying signals with various temperatures. The tolerable temperature variation for the acceptable power penalty was significantly improved due to the small wavelength shifts.

Ge/graded-SiGe multiplication layers for low-voltage and low-noise Ge avalanche photodiodes on Si

Vertical pin structures of Ge photodiodes (PDs) integrated with Si optical waveguides are fabricated by depositing Ge epitaxial layers on Si-on-insulator (SOI) layers, and the performances of n+-Ge/i-Ge/p+-SOI PDs are compared with those of p+-Ge/i-Ge/n+-SOI PDs. Both types of PDs show responsivities as high as 1.0 A/W at 1.55 µm, while the dark leakage current is different, which is consistent with previous reports on free-space PDs formed on bulk Si wafers. The dark current of the p+-Ge/i-Ge/n+-SOI PDs is higher by more than one order of magnitude. Taking into account the activation energies for dark current as well as the dependence on PD area, the dark current of the n+-Ge/i-Ge/p+-SOI PDs is dominated by the thermal generation of carriers via mid-gap defect levels in Ge, while for the p+-Ge/i-Ge/n+-SOI PDs, the dark current is ascribed to not only thermal generation but also other mechanisms such as locally formed conduction paths.

Small sensitivity to temperature variations of Si-photonic Mach-Zehnder interferometer using Si and SiN waveguides

We developed a design technique for a photonics-electronics convergence system by using an equivalent circuit of optical devices in an electrical circuit simulator. We used the transfer matrix method to calculate the response of an optical device. This method used physical parameters and dimensions of optical devices as calculation parameters to design a device in the electrical circuit simulator. It also used an intermediate frequency to express the wavelength dependence of optical devices. By using both techniques, we simulated bit error rates and eye diagrams of optical and electrical integrated circuits and calculated influences of device structure change and wavelength shift penalty.

Waveguide-integrated vertical pin photodiodes of Ge fabricated on p+ and n+ Si-on-insulator layers

We report a low-loss silicon photonic waveguide module for cryogenic applications. The fiber-to-waveguide coupling loss is 1.9 dB/facet at 4K. As a feasibility demonstration, carrier lifetime in a Si waveguide at 4K is successfully measured.

Comprehensive photonics-electronics convergent simulation and its application to high-speed electronic circuit integration on a Si/Ge photonic chip

Silicon (Si) photonic wire waveguides provide a compact photonic platform on which passive, dynamic, and active photonic devices can be integrated. This paper describe the demonstrations of several kinds of integrated photonic circuits. The platform consists of Si wire, silicon-rich Si dioxide (SiOx) and Si oxinitride (SiON) waveguides for passive devices and a Si rib waveguide with a p-i-n structure and a germanium (Ge) device formed on Si slab for active devices. One of the key technologies for the photonic integration platform is low temperature fabrication because a back-end process with high temperature may damage active and electronic devices. To overcome this problem, we have developed electron cyclotron resonance chemical vapor deposition as a low-temperature deposition technique. Another key technology is polarization manipulation for reducing polarization dependence. A polarization diversity circuit is fabricated by applying Si wire and SiON integration. The polarization-dependent loss of the diversity circuit is less than 1 dB. Moreover we have developed several kinds of integrated circuit including passive, dynamic and active devices. Ge photodiodes are monolithically integrated with an SiOx-arrayed waveguide grating (AWG). We have confirmed that the operation speed of the integrated Ge photodiode is over 22 Gbps for all 16 channels. Variable optical attenuators (VOAs) fabricated on the Si p-i-n rib waveguides and an AWG based on the SiOx waveguide are integrated successfully. The total size of 16-ch-AWG-VOAs is 15 8 mm2. The device has already been made polarization independent. Furthermore electronic circuits are successfully mounted on the integrated photonic device by using flip-chip bonding.

Cryogenic photonic module based on silicon photonic wire waveguides

We propose a 1-bit delay line interferometer (DLI) with a hybrid Mach–Zehnder structure for demodulation of phase-shift-keying (PSK) signals. Each arm contains silicon (Si)/Si-rich silica waveguides and spot size converters to generate optical delay using both of physical length and refractive index changes. This report covers the numerical analysis and experimental investigations, ranging from basic characterization to application. We employed a DLI with a free spectral range of 10.2 GHz in a demodulation experiment of 10.0-Gb/s NRZ-DPSK signals. As a result, very clear eye patterns and error-free operation are obtained from the C- to L-telecommunications bands with a device size per channel of 1.6