Terrence W. Pratt

Performance measurement of the concurrent file system of the Intel iPSC/2 hypercube

Abstract The Intel Concurrent File System (CFS) for the iPSC/2 and iPSC/860 hypercubes is one of the first production file systems to utilize the declustering of large files across numbers of disks to improve input/output (I/O) performance. The CFS also makes use of dedicated I/O nodes, operating asynchronously, which provide file caching and prefetching. Processing of I/O requests is distributed between the compute node that initiates the request and the I/O nodes that service the request. We present performance measurements of the CFS for an iPSC/2 hypercube with 32 compute nodes and 4 I/O nodes (4 disks). Measurement of read/write rates for one compute node to one I/O node, one compute node to multiple I/O nodes, and multiple compute nodes to multiple I/O nodes form the basis for the study. Additional measurements show the effects of different buffer sizes, caching, prefetching, and file preallocation on system performance. A measure of I/O system imbalance is also introduced.

Definition of Programming Language Semantics Using Grammars for Hierarchical Graphs

machine states and state transitions. An H-graph that represents the state of an abstract machine during execution of a program in a high-level programming language may contain thousands of nodes and hundreds of graphs. For example, HAL/S is a complex high-level language similar to PL/I with extensions for real-time programming. The HAL/S abstract machine contains 19 top-level nodes representing the various system data structures required for control of program execution, such as queues of active and waiting processes, stacks of activation records, lists of inputoutput channels, etc. Thus most of these top-level nodes contain graphs whose nodes themselves represent complex structures, such as processes, each modeled by many further levels of graph structure. All of the modeling power of H-graphs must be used to provide an intelligible, analyzable model of such a complex machine state. The situation is made more difficult by the fact that each step in program execution results in a transformation of the state H-graph, and program execution may involve thousands of execution steps. Most of the analysis that one wishes to do of the abstract machine involves

Performance measurement of a parallel Input/Output system for the Intel iPSC/2 Hypercube

The Intel Concurrent File System (CFS) for the iPSC/2 hypercube is one of the first production file systems to utilize the declustering of large files across numbers of disks to improve I/O performance. The CFS also makes use of dedicated I/O nodes, operating asynchronously, which provide file caching and prefetching. Processing of I/O requests is distributed between the compute node that initiates the request and the I/O nodes that service the request. The effects of the various design decisions in the Intel CFS are difficult to determine without measurements of an actual system. We present performance measurements of the CFS for a hypercube with 32 compute nodes and four I/0 nodes (four disks). Measurement of read/write rates for one compute node to one I/O node, one compute node to multiple I/O nodes, and multiple compute nodes to multiple I/O nodes form the basis for the study. Additional measurements show the effects of different buffer sizes, caching, prefetching, and file preallocation on system performance.

Control Computations and the Design of Loop Control Structures

The control computation for a loop in a program is that part of the program concerned with the initialization, incrementation, and testing of the variables that determine the flow of control into, through, and out of the loop. The elements of loop control computations are idenified and their role in structuring our understanding of loops is analyzed. It is argued, through examples drawn from a Pascal compiler, that the intelligibility of a loop is closely tied to the accessibility and intelligibility of the loop control computation. It is further argued, from an analysis of all the loops in this compiler, that most loop control computations fail in a few standard patterns, mostly concerned with the sequential processing of elements of data structures. In light of these results, common loop control statements are critiqued. It appears that better loop control structures than the while, repeat-until, and similar statement structures are possible and desirable, and some proposals for better structures are given.

Pisces: An Environment for Parallel Scientific Computation

The Pisces 1 virtual machine retains sequential programming characteristics, yet allows for experimentation with the parallel languages that will drive the supercomputers of the 1990s.

Upgrading CS1: an alternative to the proposed COCS survey course

The January 1989 report of the ACM Task Force on the Core of Computer Science (COCS) presents a critique of the traditional computer science introductory curriculum and suggests a radically different alternative: a three-semester survey course of the whole of the field. This paper presents an overview and critique of the COCS report and suggests an alternative vision of how to upgrade the CSI course. The alternative is based on an evolution from the current CSl to a course with more depth and rigor, and with a sense of history, but without broadening the focus beyond the traditional topics of algorithms, data structures, software methodology and a single high-level programming language. A new text serves as an “existence proof” of the viability of the approach.

Teaching programming: a new approach based on analysis skills

A new approach is described to the teaching of introductory computer programming and computer science (the CS1 course). The approach is based on a new view of what “programming” is fundamentally about. The central feature of the approach is the teaching of skills in <italic>program analysis</italic> along with the traditional emphasis on skills in <italic>program synthesis</italic>. The approach was class tested in an earlier version in 1986, and the difficulties encountered in the class test led to two supporting changes in the course content: (1) <italic>data structures</italic> are introduced at the beginning of the course, and (2) the concept of <italic>program state</italic> is introduced as a key element in understanding programs.

Formal specification of software using H-graph semantics

The goal of H-graph semantics as a method for software specification is to provide a means of constructing formal models of software systems. The formal models are constructed automatically from the program text and serve as the basis for analysis, verification, and transformation of the program. The resulting formal model is then directly executable with reasonable efficiency on conventional computers. The intent is to develop methods that can be applied automatically and which will “scale up” to large programs. A programming environment that supports this development and analysis activity is currently being constructed.

Program analysis and optimization through kernel-control decomposition

SummaryThe decomposition of a program into a control part, which is concerned only with determining the flow of control, and a kernel part, which is concerned only with computing output values, is proposed. It is shown that such a kernel-control decomposition is easily made and forms a useful and intuitive basis for analyzing and optimizing programs. A sequence of four progressively more abstract formal models of programs is developed, based on the concept of kernel-control decomposition. The application of these models to the study of program equivalence, termination, and optimization is outlined. The most general of the formal models, that of a set of programs forming a control structure class, formalizes a broad notion of equivalence of control structures.

Coverability graphs for a class of synchronously executed unbounded petri net

Abstract Synchronous (or concurrent) transition firing rules for Petri nets are useful in modeling computations on real-time systems with multiple processors. A synchronous firing rule is one in which more than one transition may be fired to effect a single state change, allowing the physically concurrent operation of multiple hardware processors to be represented in the state sequence without including intermediate states that have no meaningful physical interpretation. A simple counterexample illustrates that the standard method of generating a Petri net coverability graph is insufficient to represent the reachability set of a Petri net operating under a synchronous firing rule. We describe a variant of one widely used concurrent execution rule (that of firing maximal subsets) in which the simultaneous firing of conflicting transitions is prohibited. An algorithm is then given for constructing the coverability graph of a net executed under this synchronous firing rule. The ω insertion criteria in the algorithm are shown to be valid for any net on which the algorithm terminates; the set of nets on which the algorithm terminates is then shown to properly include the conflict free class.