Tetsuaki Matsunawa

A new lithography hotspot detection framework based on AdaBoost classifier and simplified feature extraction

Under the low-k1 lithography process, lithography hotspot detection and elimination in the physical verification phase have become much more important for reducing the process optimization cost and improving manufacturing yield. This paper proposes a highly accurate and low-false-alarm hotspot detection framework. To define an appropriate and simplified layout feature for classification model training, we propose a novel feature space evaluation index. Furthermore, by applying a robust classifier based on the probability distribution function of layout features, our framework can achieve very high accuracy and almost zero false alarm. The experimental results demonstrate the effectiveness of the proposed method in that our detector outperforms other works in the 2012 ICCAD contest in terms of both accuracy and false alarm.

Machine learning and pattern matching in physical design

Machine learning (ML) and pattern matching (PM) are powerful computer science techniques which can derive knowledge from big data, and provide prediction and matching. Since nanometer VLSI design and manufacturing have extremely high complexity and gigantic data, there has been a surge recently in applying and adapting machine learning and pattern matching techniques in VLSI physical design (including physical verification), e.g., lithography hotspot detection and data/pattern-driven physical design, as ML and PM can raise the level of abstraction from detailed physics-based simulations and provide reasonably good quality-of-result. In this paper, we will discuss key techniques and recent results of machine learning and pattern matching, with their applications in physical design.

Hotspot prevention and detection method using an image-recognition technique based on higher-order local autocorrelation

Abstract. Although a number of factors relating to lithography and material stacking have been investigated to realize hotspot-free wafer images, hotspots are often still found on wafers. For the 22-nm technology node and beyond, the detection and repair of hotspots with lithography simulation models is extremely time-consuming. Thus, hotspots represent a critical problem that not only causes delays to process development but also represents lost business opportunities. In order to solve the time-consumption problem of hotspots, this paper proposes a new method of hotspot prevention and detection using an image recognition technique based on higher-order local autocorrelation, which is adopted to extract geometrical features from a layout pattern. To prevent hotspots, our method can generate proper verification patterns to cover the pattern variations within a chip layout to optimize the lithography conditions. Moreover, our method can realize fast hotspot detection without lithography simulation models. Obtained experimental results for hotspot prevention indicated excellent performance in terms of the similarity between generated proposed patterns and the original chip layout patterns, both geometrically and optically. Moreover, the proposed hotspot detection method could achieve turn-around time reductions of >95% for just one CPU, compared to the conventional simulation-based approach, without accuracy losses.

Automatic layout feature extraction for lithography hotspot detection based on deep neural network

Lithography hotspot detection in the physical verification phase is one of the most important techniques in todays optical lithography based manufacturing process. Although lithography simulation based hotspot detection is widely used, it is also known to be time-consuming. To detect hotspots in a short runtime, several machine learning based methods have been proposed. However, it is difficult to realize highly accurate detection without an increase in false alarms because an appropriate layout feature is undefined. This paper proposes a new method to automatically extract a proper layout feature from a given layout for improvement in detection performance of machine learning based methods. Experimental results show that using a deep neural network can achieve better performance than other frameworks using manually selected layout features and detection algorithms, such as conventional logistic regression or artificial neural network.

A Machine Learning Based Framework for Sub-Resolution Assist Feature Generation

Sub-Resolution Assist Feature (SRAF) generation is a very important resolution enhancement technique to improve yield in modern semiconductor manufacturing process. Model- based SRAF generation has been widely used to achieve high accuracy but it is known to be time consuming and it is hard to obtain consistent SRAFs on the same layout pattern configurations. This paper proposes the first ma- chine learning based framework for fast yet consistent SRAF generation with high quality of results. Our technical con- tributions include robust feature extraction, novel feature compaction, model training for SRAF classification and pre- diction, and the final SRAF generation with consideration of practical mask manufacturing constraints. Experimental re- sults demonstrate that, compared with commercial Calibre tool, our machine learning based SRAF generation obtains 10X speed up and comparable performance in terms of edge placement error (EPE) and process variation (PV) band.

Optical proximity correction with hierarchical Bayes model

Optical Proximity Correction (OPC) is one of the most important techniques in todays optical lithography based manufacturing process. Although the most widely used model-based OPC is expected to achieve highly accurate correction, it is also known to be extremely time-consuming. This paper proposes a regression model for OPC using a Hierarchical Bayes Model (HBM). The goal of the regression model is to reduce the number of iterations in model-based OPC. Our approach utilizes a Bayes inference technique to learn the optimal parameters from given data. All parameters are estimated by the Markov Chain Monte Carlo method. Experimental results show that utilizing HBM can achieve a better solution than other conventional models, e.g., linear regression based model, or non-linear regression based model. In addition, our regression results can be fed as the starting point of conventional model based OPC, through which we are able to overcome the runtime bottleneck.

Laplacian eigenmaps and bayesian clustering based layout pattern sampling and its applications to hotspot detection and OPC

Effective layout pattern sampling is a fundamental component for lithography process optimization, hotspot detection, and model calibration. Existing pattern sampling algorithms rely on either vector quantization or heuristic approaches. However, it is difficult to manage these methods due to the heavy demands of prior knowledges, such as high-dimensional layout features and manually tuned hypothetical model parameters. In this paper we present a self-contained layout pattern sampling framework, where no manual parameter tuning is needed. To handle high dimensionality and diverse layout feature types, we propose a nonlinear dimensionality reduction technique with kernel parameter optimization. Furthermore, we develop a Bayesian model based clustering, through which automatic sampling is realized without arbitrary setting of model parameters. The effectiveness of our framework is verified through a sampling benchmark suite and two applications, lithography hotspot detection and optical proximity correction.

Hotspot detection using image pattern recognition based on higher-order local auto-correlation

Below 40nm design node, systematic variation due to lithography must be taken into consideration during the early stage of design. So far, litho-aware design using lithography simulation models has been widely applied to assure that designs are printed on silicon without any error. However, the lithography simulation approach is very time consuming, and under time-to-market pressure, repetitive redesign by this approach may result in the missing of the market window. This paper proposes a fast hotspot detection support method by flexible and intelligent vision system image pattern recognition based on Higher-Order Local Autocorrelation. Our method learns the geometrical properties of the given design data without any defects as normal patterns, and automatically detects the design patterns with hotspots from the test data as abnormal patterns. The Higher-Order Local Autocorrelation method can extract features from the graphic image of design pattern, and computational cost of the extraction is constant regardless of the number of design pattern polygons. This approach can reduce turnaround time (TAT) dramatically only on 1CPU, compared with the conventional simulation-based approach, and by distributed processing, this has proven to deliver linear scalability with each additional CPU.

Data Efficient Lithography Modeling with Residual Neural Networks and Transfer Learning

Lithography simulation is one of the key steps in physical verification, enabled by the substantial optical and resist models. A resist model bridges the aerial image simulation to printed patterns. While the effectiveness of learning-based solutions for resist modeling has been demonstrated, they are considerably data-demanding. Meanwhile, a set of manufactured data for a specific lithography configuration is only valid for the training of one single model, indicating low data efficiency. Due to the complexity of the manufacturing process, obtaining enough data for acceptable accuracy becomes very expensive in terms of both time and cost, especially during the evolution of technology generations when the design space is intensively explored. In this work, we propose a new resist modeling framework for contact layers that utilizes existing data from old technology nodes to reduce the amount of data required from a target lithography configuration. Our framework based on residual neural networks and transfer learning techniques is effective within a competitive range of accuracy, i.e., 2-10X reduction on the amount of training data with comparable accuracy to the state-of-the-art learning approach.

Deep learning in DFM applications (Conference Presentation)

Machine learning is a powerful tool to learn a predictive model which can give a statistical or probabilistic solution to a problem. It has widely been applied to major issues in design for manufacturing field, such as SRAF generation, compact resist model and lithography hotspot detection. Although it is sometimes considered as an effective technique that solves serious problems, a reliable solution is rarely achieved without detailed understanding of the problem and appropriate problem formulation. In this paper, we will discuss basic concept and recent results of machine learning applications in design for manufacturing.