Tetsuya Kitagawa

Progress in proximity electron lithography: demonstration of print and overlay performance using the low-energy electron beam proximity-projection lithography β tool

Shinji OmoriShinichiro NohdoShoji NohamaKoichi NakayamaKazuya IwaseTomonori MotohashiKeiko AmaiYoko WatanabeKazuharu InoueIsao AshidaHidetoshi OhnumaHiroyuki NakanoShigeru MoriyaTetsuya KitagawaSony Corporation4-14-1 Asahi-choAtsugi, Kanagawa, 243-0014JapanE-mail: shinji.omori@jp.sony.comAbstract. The lithographic performance of the low-energy electron-beam proximity-projection lithography (LEEPL)btool is demonstrated interms of printability and overlay accuracy to establish the feasibility ofproximity electron lithography (PEL) for the 65-nm technology node. TheCD uniformity of 5.8 nm is achieved for the 13 stencil mask, and themask patterns are transferred onto chemically amplified resist layers,coupled with a conformal multilayer process with the mask-error en-hancement factor of nearly unity. Meanwhile, the overlay accuracy of27.8 nm is achieved in the context of mix and match with the ArF scan-ner, and it is also shown that real-time correction for chip magnification,enabled by the use of die-by-die alignment and electron beam, can fur-ther reduce the error down to 21.3 nm. On the basis of the printability ofprogrammed defects, it is shown that the most critical challenge to besolved for the application to production is the quality assurance of maskssuch as defect inspection and repair.

Complementary masking approach for proximity electron lithography

We have devised a new mask format for low-energy electron-beam proximity-projection lithography (LEEPL) that enables faster and more accurate image transfer from the mask to a wafer, in comparison with the single-membrane mask as originally proposed. Simultaneous exposure over four adjacent complementary quadrants of the mask, synchronized with step-and-repeat motion of the wafer stage, yields one complete pattern with the throughput of ∼30 wafers/h. Mechanical analysis has demonstrated that the new format also offers better controllability of image placement owing to smaller membranes, even though the gravitational deformation of the mask, for example, must still be corrected for.

Litho-and-mask concurrent approach to the critical issues for proximity electron lithography

The performance of the LEEPL production tool is discussed from the framework of the litho-and-mask concurrent development schemes to establish the feasibility of proximity electron lithography (PEL) especially for contact and via layers in the 65-nm technology node. The critical-dimension (CD) uniformity of 4.7 nm has been achieved for 90-nm contact holes over the 1x stencil mask. Thus, the mask patterns can be transferred onto the resist layer with CD errors of less than 10%, even if the mask-error enhancement factor (MEEF) of 1.6 is taken into account. The mask manufacturability is improved if the MEEF further decreases via the use of thinner resists. Meanwhile, the overlay accuracy of 21.1 nm has been achieved in mix-and-match with the ArF scanner, with the intra-field error of only 5.1 nm owing to the real-time correction for the mask distortion. Also, the conditions for splitting dense lines into two complementary portions have been determined to avoid the pattern collapse in wet-cleaning and drying processes. The critical length of 2 mm is fairly safe for 70-nm lines if the low-damage drying is employed. The inspection tool based on transmission electron images cannot detect all printable defects without further optimization, hence a future challenge.

BEOL process technology based on proximity electron lithography: demonstration of the via-chain yield comparable with ArF lithography

Proximity electron lithography (PEL) using the ultra-thin tri-layer resist system has been successfully integrated in our dual-damascene Cu/low-k interconnects technology for the 90-nm node. Critical comparison between conventional ArF lithography and PEL as to the via-chain yield for test element groups (TEGs) including approximately 2.9 million via chains was performed to demonstrate its production feasibility.

On-site use of 1x stencil mask: control over image placement and dimension

We propose the efficient on-site use of a 1x stencil mask for proximity electron lithography (PEL) for controlling image placement (IP) and critical dimension (CD). It has been demonstrated that the integrated approach to the IP-error correction on the mask-fabrication level using the data manipulation and the mask-exposure level using the deflection of an electron beam (EB) can meet the requirement for the overlay accuracy in the 65-nm technology node. Also, the time-dependent variation in mask CD due to EB-assisted contamination growth can be managed by using the combination of the dose control and the periodic dry cleaning of the mask.

Resolution-limiting factors in low-energy electron-beam proximity projection lithography: Mask, projection, and resist process

The resolution-limiting factors in low-energy electron-beam proximity projection lithography were analyzed quantitatively using the blur of a Gaussian-shaped latent image (σQBP) as the resolution index. σQBP is the square root of the sum of squares of the factors, such as electron scattering and resolution performance of resist. The resolution limit of 45 nm for isolated patterns and the resolution of 70 nm for practically used periodic patterns with 10% exposure latitude were achieved at σQBP of 49 nm. Eliminating a crossover in the electron optics decreased the factor depending on the gap between a mask and a wafer to 19 nm at a 40 μm gap. Because of the intensive studies on multilayer processes, the factor attributed to the resolution performance of thin resist dropped from 58 to 26 nm. Reduction in the blur due to electron scattering, 34 nm in the case of a 70-nm-thick resist film and 2 keV electrons, must be considered for the 45 nm technology node.

State-of-the-art performance of stencil mask for LEEPL

The critical-dimension (CD) performance and the printability of 1x stencil masks used for low-energy electron-beam proximity-projection lithography (LEEPL) have been studied by using the LEEPL β-tool. The CD uniformity and the line edge roughness on the mask are 6.0 nm and 3.5 nm in 3σ, respectively. It has been found that the fidelity of the etching process is so high that the optimization of the electron-beam writing process is critical to perforate high-quality patterns. The mask error enhancement factor evaluated over 80-100 nm lies is nearly unity, demonstrating the excellent fidelity of image transfer from the mask to a wafer. The critical defect sizes are 14.5 and 22.8 nm for the protrusions on the edges of 100-nm lines and the 150-nm contact holes respectively, implying that defect inspection is a challenge. The current achievements and the final targets in the 65-nm node are compared to assess the gap that must be bridged.

Alignment accuracy of LEEPL: image placement error correction

The placement-error correction for low-energy electron-beam proximity-projection lithography (LEEPL) has been demonstrated to enable the overlay accuracy of 23 nm that meets the requirement for the 65-nm node. The overlay accuracy for LEEPL-ArF mix-and-match lithography has been analyzed, focusing separately on the intra-field error, the inter-field error, and the dynamic fluctuation over different wafers. It has been found that the intra-field error, mainly due to the distortion of a 1x stencil mask, can be effectively corrected for by using the fine deflection of the electron beam, a unique capability of the LEEPL exposure equipment. In addition, the inter-field error can be suppressed by correcting in real time for the magnification error of each chip detected by the die-by-die alignment system. The dynamic variation in the total overlay error is also small, and the overall alignment accuracy is fairly compatible with the preliminary overlay budget.

A novel approach to the mask inspection for proximity electron lithography based on electron beam imaging

We report the first evaluation results for the printability and detectability of mask defects on a 1x stencil mask as used for proximity electron lithography (PEL). The defect printability has been defined for the patterns after the multi-step etching process through the tri-layer resist system inherently required for the use of low-energy electrons and the substrate. According to the three-dimensional lithography simulation, this definition is preferable to the conventional one based on the resist patterns prior to the etching process in the point that smoothing effects on defects are automatically taken into account. The critical size of printable defects as defined is 22 nm for 140 nm contact holes, while the stringent value of 16 nm is predicted in the conventional definition. Also, the detectability of the printable defects has been assessed by using the transmission electron-beam (EB) inspection tool. The assessment has been performed for both programmed defects and real defects occurred in contact-hole arrays. For the programmed defects, the perfect repeatability has been demonstrated for all the defects with printable sizes. In addition, real defects with the size of 15 nm have been successfully detected in the contact-hole arrays. Therefore, this study has demonstrated the manufacturability of PEL masks from the viewpoint of defect inspection.

Feedforward Correction of Mask Image Placement for Proximity Electron Lithography

A production-compatible method for the correction of image-placement (IP) error over a 1x stencil mask as used for proximity electron lithography (PEL) has been demonstrated. The mask IP error as measured using a newly developed metrology tool was fed forward to the PEL stepper, LEEPL-3000 and corrected for via the fine deflection of the electron beam. The overlay errors with respect to the substrate patterned by the ArF scanner have decreased from 63.6/59.3 nm to 26.1/36.4 nm in the x/y directions, but they are still larger than the errors of 15.2/14.8 nm for the conventional feedback method. Therefore, some improvements in the metrology method, the mask chucking method, the mask flatness and so on are required.