Theodoros Kyriakidis

An Ultra-High Speed Emulator Dedicated to Power System Dynamics Computation Based on a Mixed-Signal Hardware Platform

This paper presents an ultra-high speed hardware platform dedicated to power system dynamic (small signal) and transient (large signal) stability. It is based on an intrinsic parallel architecture which contains hybrid mixed-signal (analog and digital) circuits. For a given model, this architecture overcomes the speed of the numerical simulators by means of the so-called emulation approach. Indeed, the emulation speed does not depend on the power system size. This approach is nevertheless not competing against high-performance numerical simulators in term of accuracy and model complexity. It targets to complement the numerical simulators with the advantage of speed, portability, low cost and autonomous functioning. The proof of concept is a flexible and modular 96-node hardware platform. It is based on a reconfigurable array of power system buses called Field Programmable Power Network System (FPPNS). Details on this hardware are given. Two benchmark topologies with, respectively, 17 nodes and 57 nodes are provided. Comparisons with a digital simulator are done in terms of speed and accuracy. The calibration of the system is explained and different applications are proposed and discussed. The promising results of this hardware platform show that the design of a fully integrated solution containing hundreds of power system buses can be achieved in order to provide a low cost solution.

A transient stability assessment method using post-fault trajectories

Transient Stability Assessment (TSA) is the process in which the stability of a system is characterized qualitatively or quantitatively. The TSA algorithm presented in this paper is derived from the well-established Single Machine Equivalent (SIME) method and can thus be categorized as a hybrid direct-temporal method. The novelty of the proposed algorithm is that it derives a Transient Stability Index (TSI) with a single TimeDomain (TD) simulation for both stable and unstable cases. The resulting TSI is uniform in units and linear around the instability point. Results are reported for two sample power systems of 9 and 36 buses. The proposed algorithm has also been successfully employed to speed-up a Critical Clearing Time (CCT) determination algorithm.

A mixed-platform framework for Dynamic Stability Assessment

This paper describes a mixed-platform framework dedicated to Dynamic Stability Assessment of power systems. DSA refers to tools capable of characterizing the dynamic stability of the system. Time domain simulation is critical for DSA analysis and is done by algorithms known as TD engines. In this work, operations are shared between a software platform and a hardware one. TD simulation is handled by a dedicated mixed-signal electronics implementation. Data flow control, user interfacing, configuration, result post-processing and other auxiliary operations are realized in software. This architecture combines the flexibility of the software with the high-performance of dedicated hardware. Results of a multi-contingency analysis and a critical clearing time determination analysis for sample test cases are presented. It is demonstrated that an increase in speed of almost three orders of magnitude can be achieved, compared to single-platform solutions.

A DC power flow extension

In this work an extension of the well-known DC power flow method is presented. A normal DC power flow of the system is executed to determine voltage angles and a novel derivation of voltage amplitudes is devised. The latter is rigorously formulated and eight alternative ways to tackle it are proposed. Comparative studies between the proposed versions of the algorithm verify its effectiveness in producing an accurate estimate of the voltage profile, on average in the order of 10-3 pu close to the exact solution. The proposed algorithm features very favorable computational requirements of approximately a fifth of the time required for an exact solution. Its computational efficiency renders it a solid candidate for hard real-time applications required in the emerging smart grid.

Generator coherency identification algorithm using modal and time-domain information

Coherency group identification is an integral constituent part of the wider field of reduction techniques in power systems. It consists of separating the machines in the system into groups that feature similar behavior. This paper presents a coherency identification algorithm for dynamic studies. The algorithm combines both modal and time domain techniques in an effort to combine the merits of both approaches. Its outcome is a suggested optimal number of clusters alongside the clustering itself. Tests have been conducted on a sample power system of 39 buses and its validity has been demonstrated.

Transient stability analysis of series unbalanced conditions using dedicated mixed-signal hardware

This paper examines the use of the symmetrical components theory for the representation of unbalanced conditions, when using the concept of analog emulation for highspeed power system analysis. This concept has been proven and validated through the realization of a mixed-signal hardware platform dedicated to power system studies. Computations related to the grid are handled by analog electronics, while the models of the network components are implemented on a digital processing core. Balanced operation is natively supported, while unbalanced operation is handled with the symmetrical component theory. Particular focus is given on series unbalanced operations, such as the opening of a single-phase circuit breaker. A hardware architecture solution for the complete unbalanced conditions representation is described. The proposed approach has shown significant computational speed benefits compared to traditional digital solutions.

Power flow method using a dedicated mixed-signal hardware platform

Recent work in the field of analog computing has shown that electronic emulation circuits are of large interest when targeting the speed of routines dedicated to power systems. In this paper, a power flow implementation is presented that is tailored to such a mixed-signal computing platform. A computation time of a few microseconds per algorithm iteration is reported. This time is also almost independent of the network size. Convergence in the modified algorithm is usually achieved in less than ten iterations for systems of small and moderate size. This yields an average solution speed of the power flow problem that is in the order of a hundred of microseconds.

Pipelined Numerical Integration on Reduced Accuracy Architectures for Power System Transient Simulations

This work concerns a dedicated mixed-signal power system dynamic simulator. The equations that describe the behavior of a power system can be decoupled in a large linear system that is handled by the analog part of the hardware, and a set of differential equations. The latter are solved using numerical integration algorithms implemented in dedicated pipelines on a field programmable gate array (FPGA). This data path is operating in a precision-starved environment since is it synthesized using fixed-point arithmetic, as well as it relies on low-precision solutions that come from the analog linear solver. In this paper, the pipelined integration scheme is presented and an assessment of different numerical integration algorithms is performed based on their effect on the final results. It is concluded that in low-precision environments higher order integration algorithms should be preferred when the time step is large, since simpler algorithms result in unacceptable artifacts (extraneous instabilities).

A 3D architecture platform dedicated to high-speed computation for power system

This paper presents an innovative 3D hardware architecture for power system dynamic and transient stability. Based on an intrinsic parallel architecture by means of mixed-signal circuits (analog and digital) it overcomes the speed of numerical simulators for given models. This approach does not competing the accuracy and model complexity of the high performance numerical simulators. It intends to complement them with the advantage of speed, low-cost, portability and autonomous functions. The presented architecture provides an ultra-high speed platform by means of emulation principle. The proof of concept is an array of 4×24 nodes reconfigurable platform. Hardware details and comparisons with a reference digital simulator are given.