Thierry Meynard

Interactions Between Fuel Cells and Power Converters: Influence of Current Harmonics on a Fuel Cell Stack

As fuel cells are likely to be used in many future applications, dedicated power converters must be developed and optimized. A thorough knowledge of the fuel cell operation is thus required for power electronics engineers. This paper proposes a theoretical and experimental study of the behavior of a fuel cell stack subject to current harmonics. The fundamental role of the internal double layer capacitor is demonstrated

Failures-tolerance and remedial strategies of a PWM multicell inverter

The aim of this paper is to explain the intrinsic short-circuit tolerance of an IGBT multicell inverter when a commutation failure occurs. Such a failure may either be a wrong gate voltage (malfunctioning of the driver board, auxiliary power supply failure, dv/dt disturbance) or an intrinsic IGBT failure (over-voltage/avalanche stress, temperature overshoot). IGBT stresses are studied and show that no opening of the bonding can appear and consequently no risk of explosion. That is why, owing to the imbricated cells structure, an IGBT short-circuit failure may be withstood for a few switching periods, with nevertheless nonoptimized output waveforms. The design, the lab-test of a sensor able to perform monitoring as well as the failure diagnosis are also presented. This real-time diagnosis allows either a safe stop or a remedial control strategy based on the reconfiguration of the PWM modulator. The reconfiguration strategy enables decrease of internal stresses and optimization of the output shape. A fail-safe operating may be gained for high power applications.

Reduced PWM harmonic distortion for multilevel inverters operating over a wide modulation range

It is known that the optimal carrier based approach for modulating a multilevel converter is to use a phase disposition (PD) carrier arrangement with a common mode offset added to the reference waveforms to centre the implicitly selected space vectors. However, this strategy does not fully utilize all available voltage levels at lower modulation depths, with an odd level system only using odd voltage levels and an even level system only using even voltage levels as the modulation depth varies. Recent work has suggested that this is not the harmonically optimal approach at reduced modulation depths. This paper shows how up to a 40% reduction in harmonic distortion can be achieved if all available voltage levels are used throughout the linear modulation range. The improvement is achieved by adding a simple (1/2) carrier magnitude common mode dc offset in key modulation regions, which allows the converter to use all available voltage levels. The paper uses analytical spectral decomposition and harmonic flux trajectory analysis to propose a theoretical basis for this improvement, and to determine the precise points at which the (1/2) carrier magnitude offset should be added to achieve the harmonic improvement.

Optimal Modulation of Flying Capacitor and Stacked Multicell Converters using a State Machine Decoder

Modulation of flying capacitor and stacked multicell converters (SMC) is complicated by the fact that these converters have redundant states that achieve the same phase leg voltage output. Hence a modulator must use some secondary criteria such as cell voltage balancing to fully define the converter switched state. Alternatively, the modulator can be adapted to directly specify the cell states, such as has been proposed for the harmonically optimal phase disposition (PD) strategy. However the techniques reported to date can lead to uneven distribution of switching transitions between cells, and the synthesis of narrow switched phase leg pulses. This paper presents an improved strategy that decouples the tasks of voltage level selection and switching event distribution. Conventional PD and CSVPWM strategies are used to define the target voltage level for the converter, and a finite state machine is then used to distribute the transitions to the converter cells in a cyclical fashion. Experimental results for a four level flying capacitor inverter are presented, verifying that the natural balancing properties of this converter has been preserved, the cell switching utilization is equal and the expected harmonic gains of PD and CSVPWM compared to phase shifted carrier PWM have been achieved

Design of FPGA-based emulator for series multicell converters using co-simulation tools

When high dynamic performances are desired, multicell converters are an option, but they may require extra control loops. However, cost reduction does not allow using additional sensors, and low cost estimators and observers have to be developed. Field-programmable gates arrays (FPGAs) with high sampling frequency seem to be able to perform such functions. The aim of this paper is to show how co-simulation helps designing such estimators and predicting their performances.

A ZVS imbricated cell multilevel inverter with auxiliary resonant commutated poles

The imbricated-cell multilevel converter is well suited to high power applications. It allows the series connection of n switches with natural voltage sharing between these switches enabled through the connection of n-1 flying capacitors. This paper deals with the application of soft-switching on this topology; to date, only the hard-switching mode has been studied. The use of soft switching enables an increase of the switching frequency (resulting in the size reduction of the flying capacitors) without a decrease of the converter efficiency. Of the soft switching methods considered, the Auxiliary Resonant Commutated Pole (ARCP) technique was chosen due to the relative ease in which it can be incorporated into the converter topology. Furthermore, this technique offers numerous advantages: loss reduction, no added stress to the switches and compatibility with PWM control. The main properties of the ARCP multicell converter are the same as the hard-switched topology: an increase of the apparent output switching frequency and natural self-balancing of the flying-capacitor voltages. This paper presents the results of both simulations performed and measurements taken from an experimental set-up in order to study the viable system functioning. The introduction of soft-switching strongly complicates the theoretical study of the balancing mechanisms, however. As a result, the authors depend on simulations to validate the natural balancing effect during soft switching. Lastly, a general method of loss measurement is presented. Results show that the converter losses are reduced by at least 30%.

Design of a 28 V-to-300 V/12 kW Multicell Interleaved Flyback Converter Using Intercell Transformers

A low-input voltage high-power realization is presented with the aim to demonstrate the feasibility and the interest of topologies using intercell transformer. They constitute a promising option to interleave converter stages, and therefore, can answer to the specifications considered in this paper. These specifications require a galvanic insulation and the chosen topology is the Intercell Transformer (ICT) flyback converter, previously proposed by the authors. In a first part, the operating principle of the ICT flyback converter is recalled. The second part presents briefly the main features of the intercell transformer design, more precisely described in a previous paper. This part includes a discussion about the choice of the cell number. The last part presents the design and the implementation of the complete flyback converter using eight cells. A preliminary work concerns the choice, the design, and the test of each cell elements, mainly the transformer and the primary switching stage. In the end, the experimental results are presented and discussed. They demonstrate the potential of this original topology that needs only one level of magnetic components. Considering the suitability of the converter interleaving for the high-power-low-voltage applications, the ICT flyback converter constitutes a good candidate in that field.

Flying Capacitor MultiCell Converters with Reduced Stored Energy

Flying capacitor multilevel converters (FC) have been introduced in the 90s and have given a certain number of industrial converters. Most of these products use the three-cell four-level configuration, then come the two-cell and to a lesser extent the four-cell, but although the principle can be extended to any number of cells there is not a single application using five cells or more. There is however a need for converter with five semiconductors in series or more, but today the number, size and cost of the flying capacitors limits the use of this topology to four-cell maximum. In a first section, modified topologies with less capacitors but producing the same waveforms as FC converters will be presented and classified. In a second section, topologies with a lower component count and providing a priori a lower harmonic performance are listed and compared to the previous topologies.

Stacked multicell converter (SMC): reconstruction of flying capacitor voltages

We present in this paper a new method for the observation of the flying capacitor voltages dedicated to stacked multicell converters (SMC). Unlike the imbricated-cell converter, the new SMC topology allows increasing the input voltage level while decreasing the energy stored in the converter. This consists of a hybrid association of commutation cells, which enables to share the voltage constraint on several switches. During normal operation, the flying capacitor voltages have to be kept constant by the control strategy. Due to high voltage/high power applications, it is difficult and expensive to measure the flying capacitor voltages. Therefore, a new method has been developed to estimate those voltages. After an introduction and a brief reminder on the SMC topology, we will present a new strategy to estimate the capacitor voltages based on the determination of an image of those ones regarding the control signals and the chopped voltage. The influence of the measurement noise on our new technique has also been studied carefully and appropriate strategies have been developed. The last part will be devoted to conclusions and perspectives

Design and Characterization of an Eight-Phase-137-kW Intercell Transformer Dedicated to Multicell DC–DC Stages in a Modular UPS

Recent uninterruptible power supply (UPS) systems, in the medium power range (a few 100 kW), are based on a three-power stage topology including a rectifier, an inverter, and a dc-dc converter. The dc-dc converter ensures the charger/discharger function necessary for battery management. The monolithic intercell transformer (ICT) described in this paper is dedicated to such a charger/discharger, of which the nominal power is 137 kW. This dc-dc converter is comprised of eight interleaved cells that are interconnected by the ICT. The first part of this paper briefly presents the full UPS system and the topology of the eight-cell charger/discharger arranged around the eight-phase monolithic ICT. The second part suggests a model and emphasizes the design specificities of the monolithic ICT. The final design is provided by an optimization routine, checked in the end by different 2-D and 3-D finite-element simulations, both electromagnetic and thermal. The third part describes the construction of the ICT prototype. It is then placed in a test bench that reproduces the conditions of future operations and provides current balance conditions. Finally, the experimental results obtained for the 137-kW nominal power validate design parameters and confirm the interest of the ICT solution.