Thilak Senanayake
Kyushu University
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Publication
Featured researches published by Thilak Senanayake.
ieee region 10 conference | 2002
Thilak Senanayake; Tamotsu Ninomiya
This paper presents design considerations for a fast response voltage regulator module (VRM) for the worldwide-used microprocessors. The increasing steady state and dynamic requirements are very hard to meet with conventional design techniques due to parasitic elements of the circuit. To overcome the drawback with conventional design, a new topology of inductor switching technique is proposed. The design, simulation and experimental results are presented to verify the proposed topology.
applied power electronics conference | 2004
Thilak Senanayake; Tamotsu Ninomiya
This paper proposes a multi-phase voltage regulator module (VRM) based on the buck topology employing the current amplification and absorption technique. Main advantages of the proposed topology are the fast transient response and capability to keep constant the output voltage in case of severe load changes. The design, simulation and experimental results are presented to verify the proposed topology.
international symposium on circuits and systems | 2003
Thilak Senanayake; Tamotsu Ninomiya
A new fast-response high-current clamp DC-DC converter circuit design is presented that will meet the requirements and features of the new generation of microprocessors and digital systems. The clamp in the proposed converter amplifies and absorbs the current in case of severe load changes and is able to produce high slew rate of load current and capability to keep constant the output voltage.
applied power electronics conference | 2004
Thilak Senanayake; Tamotsu Ninomiya
In this paper presents a new fast-response DC-DC converter design that will meet the requirements and features of the new generation of microprocessors. A novel method of LC clamp is applied to a DC-DC converter, which is derived from a forward topology with self resetting facility. It produces a high slew rate of load current and keeps output voltage constant in case of severe load changes. The design of the concept is verified by experiment of 12 V input and 1.8 V/12 A output.
conference of the industrial electronics society | 2003
Thilak Senanayake; Tamotsu Ninomiya
電子情報通信学会技術研究報告. EE, 電子通信エネルギー技術 | 2002
Thilak Senanayake; Tamotsu Ninomiya
publisher | None
author
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences | 2005
Thilak Senanayake; Tamotsu Ninomiya
電子情報通信学会技術研究報告. EE, 電子通信エネルギー技術 | 2004
Thilak Senanayake; Tamotsu Ninomiya
Procedia - Social and Behavioral Sciences | 2004
Thilak Senanayake; Tamotsu Ninomiya