Thomas E. Seidel

Thin film atomic layer deposition equipment for semiconductor processing

Abstract Atomic layer deposition (ALD) of ultrathin high-K dielectric films has recently penetrated research and development lines of several major memory and logic manufacturers due to the promise of unprecedented control of thickness, uniformity, quality and material properties. LYNX-ALD technology from Genus, currently at beta phase, was designed around the anticipation that future ultrathin materials are likely to be binary, ternary or quaternary alloys or nanolaminate composites. A unique chemical delivery system enables synergy between traditional, production-proven low pressure chemical vapor deposition (LPCVD) technology and atomic layer deposition (ALD) controlled by sequential surface reactions. Source chemicals from gas, liquid or solid precursors are delivered to impinge on reactive surfaces where self-limiting surface reactions yield film growth with layer-by-layer control. Surfaces are made reactive by the self-limiting reactions, by surface species manipulation, or both. The substrate is exposed to one reactant at a time to suppress possible chemical vapor deposition (CVD) contribution to the film. Precisely controlled composite materials with multiple-component dielectric and metal–nitride films can be deposited by ALD techniques. The research community has demonstrated these capabilities during the past decade. Accordingly, ALD equipment for semiconductor processing is unanimously in high demand. However, mainstream device manufacturers still criticize ALD to be non-viable for Semiconductor device processing. This article presents a broad set of data proving feasibility of ALD technology for semiconductor device processing.

ALD of Hafnium Oxide Thin Films from Tetrakis(ethylmethylamino)hafnium and Ozone

Hafnium oxide (HfO 2 ) thin films were deposited from tetrakis(ethylmethylamino)hafnium (TEMAH) and ozone (O 3 ) by atomic layer deposition (ALD) on 200 mm silicon wafers. The O 3 half-reaction shows good saturation behavior. However, gradual surface saturation is observed for the TEMAH half-reaction. Within wafer non-uniformity of less than 1% and step coverage of about 100% were achieved for trenches with aspect ratio of around 40:1. The film thickness increased linearly as the number of cycles increased. From susceptor temperatures of 160-420°C, the lowest deposition rate (A/cycle) and the highest refractive index is observed at 320°C. The atomic ratio of hafnium to oxygen determined by Rutherford backscattering is 1:2.04 for the films deposited at 320°C. The carbon and hydrogen content determined by secondary ion mass spectroscopy (SIMS) decreased as the susceptor temperature increased from 200 to 320°C. Lower carbon and hydrogen levels were obtained in the control films made with H 2 O than the films made with O 3 . A reaction mechanism of the TEMAH + O 3 ALD process is discussed. The results show that an O 3 -based ALD HfO 2 deposition is promising for microelectronic applications.

Engineered tantalum aluminate and hafnium aluminate ALD films for ultrathin dielectric films with improved electrical and thermal properties

Continued scaling of device dimensions requires deposition of high-quality thin films with a thickness of 50 angstroms or less. Nucleation effects in typical CVD processes make it difficult to achieve continuous films in this thickness regime. Atomic layer deposition (ALD), a technique developed over 25 years ago but applied to IC processing only recently, enables deposition of ultra-thin films with atomic-scale precision. This technique offers 100 percent step coverage of high aspect ratio features, as-deposited films which are amorphous and free of pinholes, excellent within-wafer uniformity and wafer-to-wafer uniformity, and favorable electrical properties. Moreover, ALD offers the opportunity to engineer material properties by creating layered structures (nanolaminates) and mixtures (alloys) which combine advantageous properties of different materials. These last features may be critical in efforts to replace silicon dioxide as the industrys dielectric workhorse if no single material emerges as a suitable direct replacement. The nanolaminate capability of ALD will be discussed with physical and electrical data on nanolaminates of aluminum oxide with tantalum pentoxide and aluminum oxide with hafnium oxide. Individual nanolaminate layers can be varied from tens of angstroms to as little as 1-2 atomic layers. Data for Al 2 O 3 /Ta 2 O 5 and Al 2 O 3 /HfO 2 alloys will also be presented demonstrating the ability to create materials with controlled, variable composition. The alloy and nanolaminate capabilities enable the creation of graded interfaces and atomically smooth transitions between different materials. Prospects for application of these materials to gate stacks and capacitors will be assessed.

Methods And Needs For Low K Material Research

For several years the industry has recognized the need of developing low k dielectric material and high conductivity metal for high performance interconnect. Low k dielectric will impact both power and delay favorably, while higher conductivity metal will reduce delay time. In order to be useful, new low k dielectric materials must be carefully characterized for their electrical, chemical, thermal and mechanical properties. In addition, their impact on process integration, fabrication cost and device reliability must also be considered. Since the gestation period for introducing a new material is very long, a set of standard testing methodologies are required to speed up the development process. This review will discuss various material options and the progress of material development and characterization methodologies. Example results will be provided for assessing these parameters.

Atomic Layer Deposition of Aluminum Nitride Thin films from Trimethyl Aluminum (TMA) and Ammonia

Aluminum nitride (AlN) thin films were deposited from trimethyl aluminum (TMA) and Ammonia (NH 3 ) by thermal atomic layer deposition (thermal ALD) and plasma enhanced atomic layer deposition (PEALD) on 200 mm silicon wafers. For both thermal ALD and PEALD, the deposition rate increased significantly with the deposition temperature. The deposition rate did not fully saturate even with 10 seconds of NH 3 pulse time. Plasma significantly increased the deposition rate of AlN films. A large number of incubation cycles were needed to deposit AlN films on Si wafers. 100% step coverage was achieved on trenches with aspect ratio of 35:1 at 100 nm feature size by thermal ALD. X-ray diffraction (XRD) data showed that the AlN films deposited from 370 °C to 470 °C were polycrystalline. Glancing angle X-ray reflection (XRR) results showed that the RMS roughness of the films increased as the film thickness increased.

Atomic Layer Deposition of Hafnium Oxide Thin Films from Tetrakis(dimethylamino)Hafnium (TDMAH) and Ozone

Hafnium oxide (HfO 2 ) thin films were synthesized from tetrakis(dimethylamino) hafnium (TDMAH) and ozone (O 3 ) by atomic layer deposition (ALD) on 200 mm silicon wafers. Gradual saturation was observed for TDMAH exposure pulse. However O 3 showed better saturation behavior for O 3 exposure. Yet, 100% step coverage was achieved for ~100nm trenches with aspect ratio of 35. Temperature dependence of the deposition rate was studied at susceptor temperature from 160°C to 420°C. The lowest deposition rate was observed at 320°C. Mercury probe measurements indicated the dielectric constant increased from 16 to 20 as susceptor temperature increased from 200°C to 320°C. Selected comparisons with tetrakis (ethylmethylamino) hafnium (TEMAH) were also made.

Reliability and electrical properties of new low dielectric constant interlevel dielectrics for high performance ULSI interconnect

We have investigated the impact of using several new promising low dielectric constant materials as inter-level dielectrics for high performance VLSI/ULSI interconnect applications. The new low dielectric constant materials under study are spin-on deposited materials which include silsesquioxane, fluorinated polyimide, fluorinated poly(arylethers), and perfluorocyclobutane with dielectric constants ranging from 2.3 to 2.8. In comparison to other spin-on deposited materials, they have relatively high thermal stability and better process compatibility. Inter-line capacitance, dielectric leakage current, metal layer resistivity, and interconnect metal linewidth were monitored as the wafers went through different thermal stress conditions. The thermal dissipation capability of the new inter-level dielectrics and their influence on metal line reliability were studied as well. The electrical and reliability properties were compared between interconnect structures using new low dielectric constant materials and structures using conventional SiO/sub 2/ deposited by plasma enhanced chemical vapor deposition. The results are important for determining how to use these new low dielectric constant materials in high performance ULSI interconnect processing. They also provide useful input for further material improvement to satisfy the ULSI processing and reliability requirement.

Dynamic particulate characterization of a vacuum load‐lock system

Particle contamination is an important issue for the development of vacuum interface technology. In this work the relative particle levels between a clean room and a vacuum chamber are compared; once vacuum conditions are reached no particles are detected implying that vacuum environments are intrinsically cleaner than clean rooms. Then the dynamics of particles are systematically studied in a vacuum load‐lock chamber during pump down. The relationship between particle count and turbulence is developed through the Reynolds number. Higher particle counts are observed under turbulent conditions and lower particle counts are obtained by reducing the pumping and venting speed. The nature of the chamber ambient is also shown to be a critical parameter. A large reduction in particle density is obtained by preparing the chamber by backfilling with dry nitrogen as compared with (moist) clean room air, even if pumped under turbulent conditions. This and other data suggests a correlative effect between moisture and...

Characteristics of ALD HfSiO/sub x/ using new Si precursors for gate dielectric applications

We have successfully developed a process for ALD HfSiO/sub x/ that can provide excellent compositional control by using new Si precursors, Si/sub 2/Cl/sub 6/ (HCDS) and SiH[(CH/sub 3/)/sub 2/]/sub 3/ (tDMAS). In addition, comparisons of electrical properties of HfSiO/sub x/ using two Si precursors have been performed. CMOSFET with HfSiO/sub x/ using HCDS results in better reliability characteristics than tDMAS. Superior electron and hole mobility (100% and 90% of universal curve at 0.8MV/cm) are also achieved with HCDS. Consequently, HCDS has the potential to be used as a Si precursor for ALD HfSiO/sub x/.

Mass production worthy HfO/sub 2/-Al/sub 2/O/sub 3/ laminate capacitor technology using Hf liquid precursor for sub-100 nm DRAMs

For the first time, we successfully demonstrated MIS capacitor with ALD (Atomic Layer Deposition) grown HfO/sub 2/-Al/sub 2/O/sub 3/ laminate film using Hf liquid precursor (Hf(NEtMe)/sub 4/) with EOT of 22.5 /spl Aring/ and acceptable leakage currents (1.0 fA/cell at 1.65 V) which is comparable to the smallest reported value. Advantages of Hf(NEtMe)/sub 4/ liquid precursor for DRAM capacitor dielectric are excellent step coverage (94% on high aspect ratio(>40:1)) and reasonable throughput (over two times higher than that of HfCl/sub 4/ solid precursor). This study will provide practical solution for chip-making industry in terms of mass production worthy process for sub-100 nm DRAM capacitor.