Thomas Steinecke

EMI modeling and simulation in the IC design process

The power integrity of the system chip plus chip package determines the RF emission potential and is thus a key quality parameter of complex integrated circuits like microcontrollers for automotive applications. However, modeling and simulation of power integrity and thus electromagnetic emission must be applied as early as possible in the IC design process. This paper presents two approaches: (1) the case study simulation in a very early IC design phase and (2) the accurate netlist/layout-based simulation at a later design phase. Both implementations have been used in combination with the Infineon 32-bit microcontroller TC1796

High-Accuracy Emission Simulation Models for VLSI Chips including Package and Printed Circuit Board

The electromagnetic emission of complex very large scale integrated circuits is determined by their operation activity plus the manifold noise propagation paths through the on-chip power routing, the package traces and the planes and traces on the printed circuit board. The design of any emission test board influences the emission finally measured at defined probing connectors. Good simulation models have to serve two main interests: (1) identification of emission-related IC design weaknesses and estimation of measured emission from the IC manufacturers point of view and (2) identification of emission- related application board design weaknesses and estimation of measured emission from the system manufacturers point of view. This paper presents a target-leading approach for a full system emission simulation model which serves both the IC and system manufacturers interests. The simulation model has been created and verified for a 32-bit automotive microcontroller containing 30 million transistors.

Generic IC EMC Test Specification

A well defined IC test setup and IC configuration is mandatory to provide EMC-related test reports of different vendors comparable and allows an objective product selection for end-users. Based on well-established international standards, the “BISS” (from “Bosch/Infineon/Siemens Specification”) working group maintains the “Generic IC EMC Test Specification”, which serves as a reference manual on how to setup repeatable electromagnetic, pulse and system-ESD tests, resulting in comparable test reports. Conducted and radiated emission and immunity tests are already well established; pulse immunity and ESD robustness measurements based on system-level tests are expected to be released in the second edition of the “Generic IC EMC Test Specification” during the first half of 2012. The paper provides an overview of this test specification and its practical application.

New Test Method for the Pulse Immunity of Microcontrollers

The paper presents a new test method for pulse susceptibility of microcontrollers which reflects the electromagnetic environment of microcontrollers in practical applications. The method includes a set of electromagnetic interference pulses and their injection networks. The waveforms of the pulses are deduced from measurements on real application boards of microcontrollers.

Using Error-Source Switching (ESS) Concept to Analyze the Conducted Radio Frequency Electromagnetic Immunity of Microcontrollers

This paper introduces a new concept, the error-source switching (ESS), for the electromagnetic immunity of microcontrollers. Under the concept of ESS, a microcontroller is a multiple-module IC. A functional module, named as the error source (ES), is the bottleneck for the immunity of microcontrollers. During the sweeping of the disturbance frequency in the RF immunity test, the ES switches between various functional modules. Each functional module has an effective frequency range. Through the theoretical analysis, the measurement and the simulation, this paper shows that the frequency behavior of the conducted RF immunity of microcontrollers can be correctly understood and reasonably simulated when and only when the ESS mechanism is considered. That conclusion provides a criterion on how to construct microcontroller models and the simulation environment in a logical way for immunity simulations.

Degradation of the Conducted Radio Frequency Immunity of Microcontrollers Due to Electromagnetic Resonances in Foot-Point Loops

The response of the microcontrollers to conducted radio frequency interference depends strongly on the frequency of the interference signals. As a symbol of the strong frequency dependence, dips appear on the immunity-frequency curve of the microcontrollers. This paper discovers that some of the immunity dips are due to resonances in the current loops through the input and output pins of the oscillator amplifier. Those dips are called foot-point immunity dips. With theoretical analysis, measurements, simulations, and optimizations, this paper gives a systematic description and treatment on the foot-point immunity dips.

Activity based high level modeling of dynamic switching currents in digital IC modules

Electromagnetic compatibility (EMC) becomes an increasingly important subject within the IC design process, because more and more market segments demand for low electromagnetic emission (EME) of integrated circuits. Therefore automatic emission model generation tools need to become part of the design flow. In this paper we present an automatic generation procedure of equivalent current sources (ECS) from chip netlists, based on an analytic approach. The ECSs describe the dynamic switching currents of digital function blocks of complex ICs. Worst case or typical current profiles are not generated by pattern simulation, but by pre-characterized logic cells and a set of configuration parameters like switching activity

Low-jitter frequency-modulated PLL

Frequency modulation of a clock is a well-known and efficient way to spread clock harmonics around a center frequency, thus reducing emitted narrow-band RF energy. While smoothly changing the clock periods, modulation continuously shifts the clock edges back and forth over a time interval determined by the modulation frequency. The resulting time interval error compared to an unmodulated clock may get so large that it violates the specification of commonly used asynchronous data protocols. This paper describes a modulation technique which manages to minimize the time interval error using a single modulated PLL clock. As a prove of concept, measurement results for jitter, electromagnetic emission and CAN communication are added and discussed.

VLSI IC emission models for system simulation

The electromagnetic emission of complex very large scale integrated circuits is determined by their operation activity plus the manifold noise propagation paths through the on-chip power routing, the package traces and the planes and traces on the printed circuit board. Good simulation models have to serve two main interests: (1) identification of emission-related IC design weaknesses and estimation of real electromagnetic emission from (1) the IC manufacturerpsilas point of view and (2) the system manufacturerpsilas point of view. This paper presents the general setup for a full system emission simulation and explains the application of this model on a 32-bit automotive microcontroller containing 20 million transistors. Tool-related accuracy limitations of this VLSI emission modeling approach are discussed.

Block model of microcontroller for electromagnetic immunity simulation

This paper presents an approach to constructing the immunity model of the microcontroller based on functional blocks. The microcontroller is treated as an assembly of functional blocks and propagation paths of electromagnetic interference. Function blocks are I/Os and cores where the interference propagation paths are referred to interconnections such as packages and on-chip power distribution network (PDN). The model structure and its building blocks are proposed. Their construction methods are presented.