Thomas W. Grieff

Disk array controller with parity capabilities

Disk array controller having internal protocol for sending address/transfer count information during first/second load cycles and transferring data after receiving an acknowldgement

Device controller with a separate command path between a host and the device and a separate data path including a first in, first out memory between the host and the device

Disk array controller having command descriptor blocks utilized by bus master and bus slave for respectively performing data transfer operations

Device controller with separate data and command paths

Disk array controller having advanced internal bus protocol

Computer device overheating warning system

Steuerungsvorrichtung fuer speicherplattenanordnung mit steuerbloecken fuer steuerungsinformation Control device for storage plate arrangement with steuerbloecken for control information

Disk Array Controller Utilizing Command Descriptor Blocks for Control Information

Contrôleur d'ensembles de disques a protocole de bus interne perfectionne