Tilo Ferchland
Advanced Micro Devices
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Publication
Featured researches published by Tilo Ferchland.
IEEE Journal of Solid-state Circuits | 2006
Wolfram Kluge; Frank Poegel; Hendrik Roller; Matthias Lange; Tilo Ferchland; Lutz Dathe; Dietmar Eggert
A single-chip 2.4-GHz CMOS radio transceiver with integrated baseband processing according to the IEEE 802.15.4 standard is presented. The transceiver consumes 14.7 mA in receive mode and 15.7 mA in transmit mode. The receiver uses a low-IF topology for high sensitivity and low power consumption, and achieves -101 dBm sensitivity for 1% packet error rate. The transmitter topology is based on a PLL direct-modulation scheme. Optimizations of architecture and circuit design level in order to reduce the transceiver power consumption are described. Special attention is paid to the RF front-end design which consumes 2.4mA in receive mode and features bidirectional RF pins. The 5.77 mm2 chip is implemented in a standard 0.18-mum CMOS technology. The transmitter delivers +3 dBm into the 100-Omega differential antenna port
international solid-state circuits conference | 2006
Wolfram Kluge; Frank Poegel; Hendrik Roller; Matthias Lange; Tilo Ferchland; Lutz Dathe; Dietmar Eggert
A 0.18mum CMOS low-IF transceiver with integrated baseband processing according to IEEE 802.15.4 is described. The 5.77mm2 die draws 14.7mA (RX) and 15.7mA (TX) while achieving -102dBm RX sensitivity and 3dBm TX power. The differential input 2.4mA RX RF-frontend provides 5.7dB system noise figure
Archive | 2004
Tilo Ferchland; Ralf Flemming; Christian Wiencke
Archive | 2003
Michael Schmidt; Wolfram Kluge; Tilo Ferchland
Archive | 2009
Thomas Hanusch; Sascha Beyer; Tilo Ferchland
Archive | 2003
Uwe Eckhardt; Jörg Borowski; Tilo Ferchland
Archive | 2012
Wolfram Kluge; Jeannette Zarbock; Tilo Ferchland
Archive | 2009
Tilo Ferchland; Eric Sachse; Rolf Jaehne
Archive | 2006
Franck Poegel; Tilo Ferchland; Thomas Hanusch
Archive | 2009
Sascha Beyer; Tilo Ferchland; Thomas Hanusch