Tobias Harion

STiC ? a mixed mode silicon photomultiplier readout ASIC for time-of-flight applications

STiC is an application specific integrated circuit (ASIC) for the readout of silicon photomultipliers. The chip has been designed to provide a very high timing resolution for time-of-flight applications in medical imaging and particle physics. It is dedicated in particular to the EndoToFPET-US project, which is developing an endoscopic PET detector combined with ultrasound imaging for early pancreas and prostate cancer detection. This PET system aims to provide a spatial resolution of 1 mm and a time-of-flight resolution of 200 ps FWHM. The analog frontend of STiC can use either a differential or single ended connection to the SiPM. The time and energy information of the detector signal is encoded into two time stamps. A special linearized time-over-threshold method is used to obtain a linear relation between the signal charge and the measured signal width, improving the energy resolution. The trigger signals are digitized by an integrated TDC module with a resolution of less than 20 ps. The TDC data is stored in an internal memory and transfered over a 160 MBit/s serial link using 8/10 bit encoding. First coincidence measurements using a 3.1 × 3.1 × 15 mm3 LYSO crystal and a S10362-33-50 Hamamtsu MPPC show a coincidence time resolution of less than 285 ps. We present details on the chip design as well as first characterization measurements.

STiC - A mixed mode chip for SiPM ToF applications

STiC is a mixed mode 16-channel ASIC chip in UMC 0.18 /Lm CMOS technology aiming at Silicon Photomultiplier (SiPM) readout with optimal timing resolution. It is designed for ToF measurements in HEP and medical imaging applications and dedicated in particular to the ENDOToFPET·US project, which aims at providing a powerful endoscopic Time· of-Flight PET system for early prostate and pancreas cancer diagnostics. The goal of this endoscopic system is to provide a spatial resolution of the order of 1 mm and a Time-of-Flight resolution of 200 ps FWHM. The STiC chip has a differential structure. However, SiPMs can be connected either differentially or single-endedly. The timing and charge information of the input signal - both required for a high-resolution ToFPET system - are encrypted into two time stamps and processed later by an embedded TDC module with a timing resolution of better than 20 ps. The digitized data are stored first on an on-chip SRAM block and then transferred via a 160 MBit LVDS serial link using 8/10-bit encoding. The simulated single pixel timing jitter is less than 15 ps for Hamamatsu SI0362-11-50 MPPCs. A special linearization method has been used to obtain a linear charge response in a very wide range. The total power consumption is about 20 m W per channel. Design details as well as first measurement results will be presented.

STiC2 - characterization results of a SiPM readout ASIC for time-of-flight applications

STiC is a mixed-mode readout ASIC for silicon-photomultipliers (SiPM) developed in the framework of the EndoToFPET-US project. The chip has been designed in the UMC 0.18 μm technology and aims to provide an optimal timing resolution to Time-of-Flight measurements in medical imaging and particle physics applications. The differential design of the analog input stage rejects noise from the large integrated digital part as well as external sources. The chip allows either a differential or a single-ended readout of the sensors. The time and charge information of the input signal is converted into two time stamps which are digitized by an integrated TDC module with a time binning of 50 ps. A special linearized Time-over-Threshold method has been implemented to provide a linear response to the signal charge in a wide range. The digitized event information is stored in a 64-word FIFO memory and transmitted every 6.4 μs to an external DAQ system using a 160 MBit=s LVDS serial link with 8/10-bit encoding. Characterization measurements show a trigger jitter of σ <; 30 ps for input signals larger than 3 pC injected over a 33 pF capacitor. A measurement using 3.1 × 3.1 × 15mm3 LYSO crystals and Hamamatsu MPPC (S10362-33-50C) sensors to detect coincidence photons from positron annihilations shows an energy resolution of ~ 12% for the 511 keV peak and a coincidence time resolution of 220 ps FWHM. We present details of the ASIC design as well as characterization measurements.

A dedicated readout ASIC for Time-of-Flight Positron Emission Tomography using Silicon Photomultiplier (SiPM)

STiC is a mixed-mode Application Specific Integrated Circuit (ASIC) for Silicon Photomultiplier (SiPM) readout with very high timing resolution. It is designed for the Time-of-Flight (ToF) measurement in Positron Emission Tomography (PET) and in high energy physics experiments. STiC is dedicated particularly to the EndoTOFPET-US project, which is developing and building a multi-modal instrument combing ToFPET and ultrasound endoscopy for the development of new biomarkers for pancreas and prostate oncology. A 64-channel prototype (STiC v3) has been developed and produced in 0.18μm UMC CMOS technology. A fully differential analog front-end has been developed to suppress the common-mode noise from both the on-chip digital part and the outer sources, while it allows for both differential and single-ended readout connection schemes with SiPM. A digital-to-analog converter on the input stage tunes the SiPM bias voltage with a range of ~ 900 mV, providing the possibility to compensate the variation on the breakdown voltage of the connected SiPMs. A linearized time-over-threshold method has been implemented to provide better energy resolution than the conventional ToT method. The time and energy information are converted into two time stamps, which are digitized by a build-in TDC with time binning of 50.2 ps. A dedicated digital part has been developed for chip configuration with a Serial Peripheral Interface and for data transmission to an external Data Acquisition System using a 160 MBit/s LVDS serial link with 8/10-bit encoding. Measurements have shown a time jitter <; 20 ps on the analog front-end and a time jitter of ~ 37 ps on the TDC and digital part. A Coincidence Time Resolution of ~ 214 ps FWHM has been obtained by STiC v3 with 3.1 × 3.1 × 15 mm2 LYSO:Ce crystals and Hamamatsu MPPCs (S12643-050CN(x)). Here we present the details of the ASIC design, measurement results as well as the 128-channel front-end module for EndoTOFPET-US project.

Towards a time-of-flight positron emission tomography system based on Multi-Pixel Photon Counter read-out

We present the first commissioning data of our TOF-PET test device featuring MPPC read-out of small size LFS crystals. We discuss the characteristics of the test device and present results from two different multi-channel read-out ASIC chips which offer a high timing performance.

STiC — An ASIC CHIP for Silicon-photomultiplier fast timing discrimination

STiC-Silicon Photomultipler (SiPM) Timing Chip, is a prtotype ASIC with 4 channels dedicated to fast timing discrimination in Positron Emmission Tomography using SiPM. It is designed in AMS 0.35μm CMOS technology. Each single channel of the chip can be operated either in constant fraction (CF) or leading edge (LE) triggering mode. The basic principle of the SiPM readout is to sink the current signal into a low impedance current buffer and duplicate the current into two processing paths for later current discrimination. One of the two paths is used for low threshold triggering, which can be applied as LE triggering as well as a Time over Threshold (ToT, with a roughly higher threshold) for energy measurement. The other path passes the signal into a current high pass filter to generate the bipolar pulse for CF timing. Since the input stage of the filter is implemented by an integral capacitor. Measuring the voltage at this point also gives charge of the signal. The engery resoltion of charge measurement is 11% for a 22Na source. Meawhile 20% resolution is also accomplished using ToT methode. The coincidence timing is 479ps and 712ps (FWHM) repectively for LE and CF. The results of both timing methods are compared and discussed.

MuTRiG: a mixed signal Silicon Photomultiplier readout ASIC with high timing resolution and gigabit data link

MuTRiG is a mixed signal Silicon Photomultiplier readout ASIC designed in UMC 180 nm CMOS technology for precise timing and high event rate applications in high energy physics experiments and medical imaging. It is dedicated to the readout of the scintillating fiber detector and the scintillating tile detector of the Mu3e experiment. The MuTRiG chip extends the excellent timing performance of the STiCv3 chip with a fast digital readout for high rate applications. The high timing performance of the fully differential SiPM readout channels and 50 ps time binning TDCs are complemented by an upgraded digital readout logic and a 1.28 Gbps LVDS serial data link. The design of the chip and the characterization results of the analog front-end, TDC and the LVDS data link are presented.

Tile Rear Extension module for the Phase-I upgrade of the ATLAS L1Calo PreProcessor system

After the Phase-I ATLAS upgrade the Tile calorimeter will have to provide its data via fast optical links to the new Feature Extractor (FEX) modules of the L1Calo trigger system. In order to provide the FEXes with digitised Tile data, new Tile Rear Extension (TREX) modules need to be developed and installed in the existing L1Calo PreProcessor system. The TREX modules are highly complex PCBs, with state-of-the-art FPGAs and high-speed optical transmitters working at rates up to 14 Gbps. The prototype design of TREX and first corresponding test results will be presented.

KLauS: an ASIC for silicon photomultiplier readout and its application in a setup for production testing of scintillating tiles

KLauS is an ASIC produced in the AMS 0.35 μm SiGe process to read out the charge signals from silicon photomultipliers. Developed as an analog front-end for future calorimeters with high granularity as pursued by the AHCAL concept in the CALICE collaboration, the ASIC is designed to measure the charge signal of the sensors in a large dynamic range and with low electronic noise contributions. In order to tune the operation voltage of each sensor individually, an 8-bit DAC to tune the voltage at the input terminal within a range of 2V is implemented. Using an integrated fast comparator with low jitter, the time information can be measured with sub-nanosecond resolution. The low power consumption of the ASIC can be further decreased using power gating techniques. Future versions of KLauS are under development and will incorporate an ADC with a resolution of up to 12-bits and blocks for digital data transmission. The chip is used in a setup for mass testing and characterization of scintillator tiles for the AHCAL test beam program.

KLauS - a charge readout and fast discrimination chip for silicon photomultipliers (SiPMs)

KLauS is an ASIC chip in AMS 0.35µm SiGe Technology with 12 channels. It was developed in October 2010 for the Analog Hardonic Calorimeter (AHCal) of the International Linear Collider (ILC). SiPMs are used to read out the organic scintillator tiles in such a calorimeter. The chip is supposed to provide a readout solution for SiPMs with very low gain (2.75×105). The total dynamic range of the chip is up to 200pC with an integral non-linearity of about 1%. The signal to noise ratio is better than 10 for single photon signals of such low gain SiPMs. The ASIC allows to tune the input voltage by 2V, which is meant to compensate the breakdown voltage variation of silicon photomultipliers. In addition to charge measurement, the chip also offers a very fast trigger signal with a tunable threshold. The threshold can be set even less than single photon signals, which guarantees single pixel triggering. The timing jitter is 52ps for a MIP signal with 15 pixels fired at the same time, which is the nominal MIP signal of the ILC AHCal. In addition, in order to cope with the special ILC clock pattern for power consumption reduction, the chip is able to do power pulsing with 1% “power-on” time of the total ILC period. The input bias voltage can be kept on the preset value with only 1% error of total over voltage of SiPMs in the whole power pulsing period. The total stand-by power is less than 2mW.