Tom P. E. Broekaert

A monolithic 4 bit 2 GSps resonant tunneling analog-to-digital converter

The combination of resonant-tunneling diodes and heterostructure field-effect transistors provides a versatile technology for implementing microwave digital and mixed-signal applications. Here we demonstrate and characterize the first monolithic flash analog-to-digital converter (ADC) in this technology. The first-pass ADC achieved 2.7 effective bits at 2 gigasamples per second (Gsps) for a 220-MHz input signal. The one-bit quantizer achieved a single-tone spurious free dynamic range greater than 40 dB at 2 Gsps for a 220-MHz single-tone input with dithering.

Transistors and tunnel diodes for analog/mixed-signal circuits and embedded memory

An integrated tunnel diode/transistor process can be used to increase the speed of signal processing circuitry or reduce power at the same speed; in memory applications, tunnel diodes can be used to reduce static power dissipation (>20X in Si, >1000X in III-V materials) relative to conventional approaches. This paper summarizes recent progress in InP and Si-based tunnel diodes and circuits.

Resonant-tunneling mixed-signal circuit technology

Abstract A large-scale integration (LSI) InP-based technology is described for high-speed mixed-signal circuits. The monolithic 75-mm wafer process uses molecular beam epitaxy, InP etch stop layers, an electron-beam-defined gate, non-alloyed ohmic contacts, and 10 mask levels to provide resonant tunneling diodes (RTDs), 0.25- or 0.5-μm gate-length high electron mobility transistors (HEMTs), Schottky diodes, resistors, capacitors and two and a half levels of interconnect. Resonant tunneling circuits described here for the first time include a 2.5-GHz, ten stage, tapped shift register, a 6.5-GHz clock generator and a multivalued-to-binary converter.

Multibit resonant tunneling diode SRAM cell based on slew-rate addressing

We propose and demonstrate a resonant-tunneling diode (RTD) based memory cell in which N bits are stored in a series combination of N RTDs without internal node contacts. The slew rate of an applied voltage signal determines the circuit switching dynamics and allows addressing of the bits. We verify slew rate dependent switching order of up to four series RTDs experimentally and through SPICE simulation incorporating a physics-based RTD model. The new addressing scheme allows N bits to be stored in a stack of N vertically integrated RTDs compared to log/sub 2/ (N) bits in previous demonstrations. We demonstrate a two-bit two-RTD static memory cell based on the new method.

Resonant tunneling circuit technology: has it arrived?

A three-dimensional large-scale integration (LSI) process for fabrication of resonant tunneling diodes and heterojunction field-effect transistors on InP has been demonstrated, combining two of todays fastest semiconductor devices. Demonstrations of this technology now include multigigahertz digital and mixed-signal circuits and ultralow power SRAM circuits; 25 to 100 GHz circuits are clearly in range for this technology.

Resonant tunneling technology for mixed signal and digital circuits in the 10-100 GHz domain

The inherent bistability and picosecond time-scale switching of the resonant tunneling diode (RTD) provides an ideal element for the design of digital circuits and analog signal quantizers in the 10-100 GHz domain. New differential RTD-based circuits for quantizers and a first-order sigma-delta modulator capable of operating at 10 GHz and beyond are introduced.

Monolithic 4 bit 2 GSps resonant tunneling analog-to-digital converter

The combination of resonant tunneling diodes (RTDs) and heterostructure field-effect transistors (HFETs) provides a versatile technology for implementing microwave digital and mixed-signal applications. Here we demonstrate the first monolithic flash RTD/HFET analog-to-digital converter (ADC). The first pass ADC achieved 2.7 effective bits at 2 GSps. The one bit quantizer achieved a single tone spurious free dynamic range (SFDR) of greater than 40 dB at 2 GSps for a 220 MHz single tone input with dithering.

Fabrication of lateral resonant tunneling devices with heterostructure barriers

Lateral resonant tunneling devices that employ heterostructure charge barriers are candidates to replace complementary metal–oxide–semiconductor devices as the basic device type that will drive integrated circuit technology in the next century. We present progress in lateral resonant tunneling device technology including the first lateral resonant tunneling transistor that has heterostructure barriers to be fabricated with planar processing techniques. The devices produced to date are limited to cryogenic operation; however, they do demonstrate that lateral resonant tunneling devices can be fabricated with etch and regrowth techniques and suggest the possibility of an integrated circuit technology that may be scaled down to less than 10 nm and would operate at room temperature.

50Gb/s 3.3V logic ICs in InP-HBT technology

50Gb/s 3.3V InP-HBT logic ICs with 6ps rise time and 1200mVpp output swing include: D-flip-flop, double-edge triggered flip-flop, dividers, a frequency doubler, XOR/OR gates, and a 1:2 fanout buffer. The DFF has 3ps/sub pp/ deterministic and <190fs/sub rms/ random jitter, >270deg phase margin, and 12mV/sub pp/ sensitivity at 40Gb/s and 10/sup -12/ BER. The ICs dissipate 480-840mW in 1mm/sup 2/.