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Dive into the research topics where Toshihisa Nonaka is active.

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Featured researches published by Toshihisa Nonaka.


Thin Solid Films | 2000

Crystal structure of GeTe and Ge2Sb2Te5 meta-stable phase

Toshihisa Nonaka; Gentaro Ohbayashi; Yoshiharu Toriumi; Yuji Mori; Hideki Hashimoto

Abstract Direct X-ray diffraction measurement of the erased state of the Ge–Sb–Te recording layer in a four-layered phase change optical disk, which was produced by an optical disk drive, was performed. It was identified as an fcc crystal structure. In order to carry out the detailed crystal structure analysis by the powder X-ray diffraction method with Rietveld refinements, somewhat larger amount of the fcc crystal powder was prepared from deposited 10 μm thick films. It revealed that Ge2Sb2Te5 belongs to the NaCl type structure (Fm3m) with the 4a site including 20% vacancies. The conclusion was supported by the results of the density measurements with Grazing Incidence of X-ray Reflectivity.


electronic components and technology conference | 2003

Embedded optical interconnections on printed wiring boards

Takeshi Suzuki; Toshihisa Nonaka; Nobuyuki Ogawa; Sang-Yeon Cho; Sang-Woo Seo; Nan Marie Jokerst

Optical interconnections using fully embedded optoelectronic components offer high performance interconnection options that can be integrated into current printed wiring board electrical interconnection systems. In this paper, we demonstrate fully embedded optical interconnections on commercially available printed wiring board (PWB) using an embedded thin film metal-semiconductor-metal (MSM) photodetector. The detailed fabrication steps and process conditions are described in this paper. The photocurrent to dark current ratio for the embedded photodetector was over 100, and the measured impulse response of the fabricated embedded MSM photodetector was 22 ps.


electronic components and technology conference | 2004

Development of high-k inorganic/organic composite material for embedded capacitors

Manabu Kawasaki; Yoshitake Hara; Yuka Yamashiki; Noboru Asahi; Ryo Nagase; Takenori Ueoka; Masahiro Yoshioka; Toshihisa Nonaka

The particle size distribution control and the dispersion agent were investigated, and a higher than 79 vol.% BaTiO/sub 3/ filler loading to epoxy resin was implemented by suppressing the porosity increment. The dielectric constant of a 10 /spl mu/m thick film at 1 MHz was 115, which corresponded to a capacitance density of larger than 10 nF/cm/sup 2/. The dielectric constant was 100 at 10 GHz when evaluated from 45 MHz -10 GHz. The chemical state evaluation of the surface of the filler, which was performed by FT-IR spectroscopic analysis, revealed that the water surface absorption of the filler increased the dielectric loss. After the dispersant was added and the composition of the resin and cure condition was optimized, the dielectric loss of the composite was 0.02 at 1 MHz. The temperature dependence of the dielectric constant was evaluated and was shown to be small. A laser via formation process using the composite material was also examined. It was confirmed that a 100 /spl mu/m diameter via hole into a 10 /spl mu/m thick layer could be formed. The inplane CTE of the composite material was 17 ppm//spl deg/C, obtained by stress measurement of the film. This value is coincident with the CTE of Cu. The elastic modulus was measured and found to be 18 GPa at 75 vol.% of the filler.


IEEE Transactions on Advanced Packaging | 2004

Planar lightwave integrated circuits with embedded actives for board and substrate level optical signal distribution

Nan Marie Jokerst; Thomas K. Gaylord; Elias N. Glytsis; Martin A. Brooke; Sang-Yeon Cho; Toshihisa Nonaka; T. Suzuki; D.L. Geddis; Jaemin Shin; Ricardo A. Villalaz; J. Hall; Ananthasayanam Chellapa; M. Vrazel

This paper explores design options for planar optical interconnections integrated onto boards, discusses fabrication options for both beam turning and embedded interconnections to optoelectronic devices, describes integration processes for creating embedded planar optical interconnections, and discusses measurement results for a number of integration schemes that have been demonstrated by the authors. In the area of optical interconnections with beams coupled to and from the board, the topics covered include integrated metal-coated polymer mirrors and volume holographic gratings for optical beam turning perpendicular to the board. Optical interconnections that utilize active thin film (approximately 1-5 /spl mu/m thick) optoelectronic components embedded in the board are also discussed, using both Si and high temperature FR-4 substrates. Both direct and evanescent coupling of optical signals into and out of the waveguide are discussed using embedded optical lasers and photodetectors.


electronic components and technology conference | 2014

High throughput thermal compression NCF bonding

Toshihisa Nonaka; Yuta Kobayashi; Noboru Asahi; Shoichi Niizeki; Koichi Fujimaru; Yoshiyuki Arai; Toshifumi Takegami; Yoshinori Miyamoto; Masatsugu Nimura; Hiroyuki Niwa

High through put thermal compression NCF bonding was studied and the new process consisting of dividing pre and main bonding, and the multi die gang main bonding has been developed. The dividing could change the process from serial to parallel and enabled to use the constant heated bonder head, which eliminated the time consuming head cooling process of the conventional serial thermal compression bonding. The die of 7.3 × 7.3 × 0.1 mm size with bumps of 38 × 38 μm2 square Cu pillar covered by Sn-Ag cap, which had the pitches of 80 μm at peripheral and 300 μm at corer area, and the organic laminated substrate with Cu/OSP trace were used as the test vehicle in this study. Firstly, the dividing of pre and main bo ndi ng process in the case of si ngle die was investigated. The prebonding was the die placement to the NCF on the substrate, which was carried out at 150°C for 0.5 second. The substrate was kept at 80°C during the process. After the pre bonding the test vehicle was removed out from the equipment and cooled down to room temperature. And then it was mounted back to the equipment again and main bonding was carried out at 240°C for 20 seconds. The same substrate temperature as the pre bonding process was kept. Solder joint formation and NCF curing was made at the process. The assembled test vehicle was evaluated. The cross sectional observation results showed that the bump solder wetted the Cu trace on the substrate and no void was detected in the NCF by C-SAM observation. Secondly, the multi die main gang bonding was studied. The equipment was newly designed and built. 15 dies were pre bonded on the substrate with the same condition as that of the single die experiment. After the pre bonding was finished, the substrate was moved to the main gang bonder. During the transportation the substrate was cooled down to room temperature. The 15 dies were bonded at one time at 240°C for 10 seconds. The substrate was heated at 240°C during the process. The evaluation of the assembled dies revealed that the solder wettability of the joints and void detection in the NCF was almost the same as those of the single die pre and main divided bonding. This main bonding process time corresponded to 2700 UPH.


electronic components and technology conference | 2012

Low temperature touch down and suppressing filler trapping bonding process with a wafer level pre-applied underfilling film adhesive

Toshihisa Nonaka; Shoichi Niizeki; Noboru Asahi; Koichi Fujimaru

Flip chip bonding process of the chip touch down at 40°C and suppressing the material trapping at the joint area with the wafer level NCF (Non conductive film), which is pre applied underfilling film adhesive, has been investigated. The test vehicle wafer has 25 μm diameter and 50 μm height bumps which are 10 μm height Cu pillar and 40 μm height Sn-Ag solder cap. The bump pitch was 200 μm. The 55 μm thickness 50 wt% filler loaded NCF was laminated on the wafer and then the surface was planarized with the bump solder layer exposing by the bit cutting technique. Such prepared chip was bonded as the top chip to the bottom chip which has the 25 μm diameter pad of 3 μm Cu bottom, 2 μm Ni middle and 0.1 μm Au top. To insert the sticking step in the bonding process, which melts and flows down the NCF underneath the top chip to the bottom chip partially, the chips were held well the aligned position during the successive processes. The gang bonding possibility was also proved with the four chips together bonding. PCT (pressure cooker test, 121°C and 100%Rh for 168 hours) was performed to the gang bonded samples. By shortening the joint formation step time form 25 to 5 seconds Cu diffusion into the solder bulk area was suppressed and the durable joint to the PCT was formed. It was confirmed by the cross sectional observations.


electronic components and technology conference | 2008

Development of wafer level NCF (non conductive film)

Toshihisa Nonaka; Koichi Fujimsru; Noboru Asahi; Ken-ichi Kasumi; Yu Matsumoto

The wafer level non conductive film (WL-NCF) has been developed, which has dynamic temperature dependence of viscosity. The b-stage WL-NCF was laminated onto the wafer without void, which has 870 Au bumps of 15 mum height and 25 mum pitch. The wafer with the WL-NCF on the surface was cut into chips by standard dicing process. The chip which has the NCF on the surface was bonded onto the ITO wired glass substrate by a flip chip bonder and the electrical connection was confirmed.


cpmt symposium japan | 2010

Wafer and/or chip bonding adhesives for 3D package

Toshihisa Nonaka; Koichi Fujimaru; Akira Shimada; Noboru Asahi; Yoshiko Tatsuta; Hiroyuki Niwa; Yasuko Tachibana

For 3D package application the demanded feature of chip bonding adhesive was discussed and the material was developed, which was wafer level process compatible NCF (Non conductive sheet). It should be high flowability for lamination on a bumped wafer surface without void, diced with wafer without deformation or sticking dust, transparent for alignment mark detection and low coefficient of thermal expansion (CTE) for the package thermal cycle durability. The nano particle dispersed and highly loaded NCF has been developed to satisfy the demanded characteristics. The CTE was 37°C/ppm and 1% weight loss temperature is higher than 350°C. The photosensitive NCF has been also developed. Bump top adhesive can be removed completely by photolithography before bonding process. It can wipe off the anxiety of adhesive residue between bump and pad. This material is also good for lamination and has high heat resistance of 1% weight loss temperature higher than 300°C.


electronic components and technology conference | 2016

Large Panel Level Fan Out Package Built up Study with Film Type Encapsulation Material

Hiroshi Takahashi; Hirokazu Noma; Naoya Suzuki; Yutaka Nomura; Aya Kasahara; Nozomu Takano; Toshihisa Nonaka

Die first and face up type FO-PLP preparation was studied referring the organic substrate fabrication process. 660 mm x 515 mm size carrier was used and 640 mm x 495 mm area was encapsulated with the film molding material comparing with granule material. 3 mm x 3mm to 10 mm x 10 mm dies were mounted on the panel using temporary adhesive. Die shift at compression molding was evaluated in each die size. Larger die showed smaller die shift distance. The affection of the carrier CTE to the die shift was also investigated. The board which had CTEs of 6, 8, and 14 ppm/K were used. CTE of 14 ppm/K material showed the minimum di shift. Tracking of the warpage during the preparation process by each process step indicated that each material selection can control the warpage. Wiring layer was fabricated on the die molded panel which had the size of 510 mm x 407 mm. Laminate type insulation material was used. Filled via of 35 micron diameter and L/S = 15 / 15 micron was formed by 355 nm laser drilling and SAP.


international conference on electronics packaging | 2014

Fine-pitch hybrid bonding with Cu/Sn microbumps and adhesive for high density 3D integration

Masaki Ohyama; Jun Mizuno; Shuichi Shoji; Masatsugu Nimura; Toshihisa Nonaka; Yoichi Shinba; Akitsu Shigetou

In this study, we developed single-pitch hybrid bonding technology for high density 3D integration. To realize the single-pitch, smaller than 10-μm pitch, hybrid bonding, 8 μm-pitch Cu/Sn microbumps and nonconductive film (NCF) were used. The planar structure to simultaneously bond was formed by chemical mechanical polishing (CMP). After the planarization, the Cu/Sn bumps and NCF were simultaneously bonded at 250 °C for 60 s. Cross sectional observation of the bonded sample by scanning electron microscope (SEM) indicated that 8 μm-pitch bump bonding was carried out successfully and the NCF filled the 2.5-μm gap between the chip and substrate without significant voids. In addition, a tensile test was performed as a mechanical reliability test. The tensile strength was 3.86 MPa. From SEM observation of the fractured surface after the tensile test, the fractured surface of the bumps was intermetallic compound (IMC) layer between Cu and Sn. These results indicated that hybrid bonding was effective method for single-pitch bonding and underfilling.

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