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Publication
Featured researches published by Toshihisa Tanaka.
international conference on consumer electronics | 1993
Tetsuo Iwaki; Toshihisa Tanaka; Eiji Yamada; Tohru Okuda; Taizoh Sasada
The authors propose an architecture for an error correction circuit suitable for high-rate data decoding of the Reed-Solomon code. It features a multiple-error correction capability of 4 errors or 8 erasures. The operational steps for multiple-error decoding are reduced by a 4-stage pipeline and a superscalar processor of a Galois field. The experimental circuits 16 Mbyte/s rate of data decoding is sufficient for compressed video signals of high-definition as well as those of standard-definition TVs. >
Archive | 1993
Tetsuo Iwaki; Toshihisa Tanaka; Eiji Yamada
Archive | 2001
Toshihisa Tanaka; Atsushi Umagoe; 稔久 田中; 淳 馬越
Archive | 2000
Toshihisa Tanaka; 稔久 田中
Archive | 1997
Toshihisa Tanaka; 稔久 田中
Archive | 2006
Kenichi Sato; Toshihisa Tanaka; 健一 佐藤; 稔久 田中
Archive | 1992
Tetsuo Iwaki; Toshihisa Tanaka; 哲男 岩木; 稔久 田中
Archive | 2013
Masuhiro Tsukada; 益裕 塚田; Toshihisa Tanaka; 稔久 田中; Yoshihiko Amano; 良彦 天野; Masahiro Mizuno; 正浩 水野; Daisuke Yamashita; 大輔 山下
Archive | 2008
Toshihisa Tanaka; 稔久 田中
Archive | 1993
Tetsuo Iwaki; Toshihisa Tanaka; Eiji Yamada