Toshikazu Nishino

Three-terminal superconducting device using a Si single-crystal film

A three-terminal superconducting device composed of a semiconductor-coupled Josephson junction and an oxide-insulated gate is fabricated. A p-type Si single-crystal film having a 100-nm thickness is used for the semiconductor layer. Two superconducting electrodes of the Josephson junction correspond to source and drain electrodes of the three-terminal device. Josephson tunneling current flows between source and drain electrodes, and is controlled by the gate bias voltage.

DC-SQUID with High-Critical-Temperature Oxide-Superconductor Film

Voltage vs magnetic-flux characteristics of a DC-SQUID using YBa2Cu3O7-δ film have been studied. YBa2Cu3O7-δ film SQUID was fabricated by lithographical patterning. The DC-SQUID operated up to 72 K.

0.1- mu m gate-length superconducting FET

A superconducting field-effect transistors (FET) with a 0.1- mu m-length gate electrode was fabricated and tested at liquid-helium temperature. Two superconducting electrodes (source and drain) were formed on the same Si substrate surface with an oxide-insulated gate electrode by a self-aligned fabrication process. Superconducting current flowing through the semiconductor (Si) between the two superconducting electrodes (Nb) was controlled by a gate-bias voltage.<<ETX>>

Electrical properties of Au/Nb‐doped‐SrTiO3 contact

Current‐voltage measurements for Au/Nb‐doped‐SrTiO3 contacts have been performed over a temperature range from 4.2 to 277 K. The forward characteristics above 46 K are well described by the Schottky diode model. The temperature dependence of the parameter E{=[∂log I/∂(qV)]−1} and the saturation current IS show that a thermionic‐field emission is dominant in the carrier transport mechanism across contacts above 101 K. It is found that the parameter E is too large compared with an estimated value from the Schottky diode model using a permittivity obtained from the inverse characteristics of capacitance‐voltage measurements. We discuss the barrier properties and suggest the possibility of imperfect ionization of the impurity Nb at the surface of the SrTiO3:Nb substrate.

Progress in Nb-based low-temperature superconductive electronics for high-speed digital applications in Japan

Recent progress in Nb Josephson junction LSI technology in Japan is described. Improvements in fabrication processes of the Nb/AlOx/Nb junction have brought high junction-current densities and sub-micrometre junction sizes. Research efforts on logic LSIs have mainly focused on applications to high-speed switches for broad-band communication and high-performance parallel computing. The highest achieved clock frequency of the logic LSIs is beyond 3 GHz. Josephson memory technology has also progressed realizing an access time of 380 ps for a 4 kbit LSI. In a new approach toward logic circuits for future information systems, basic research on a hybrid circuit technology, composed of superconductive and semiconductor devices, has also been started in Japan. The present status of these research efforts in Japan is reviewed.

Light Detection by Superconducting Weak Link Fabricated with High-Critical-Temperature Oxide-Superconductor Film

The light-induced changes in the current-voltage characteristics are studied for a superconducting weak link fabricated with a polycrystalline YBa2Cu3O7-δ film. The maximum superconducting current decreases by exposure to light at temperatures up to 77 K. The sensitivity of the light detection is enhanced by the use of a photoconductive semiconductor film on the surface of the weak link.

Superconducting packet switch

Very broad band throughputs greater than 1T bit/sec are desired in heavily loaded communication systems. Using the merits of superconducting devices, a superconducting network system is expected to improve the throughputs of such communication bottleneck systems. The paper describes a superconducting packet switch which is indispensable to a proposed superconducting network system. Considering the characteristics of various switch architectures, the space-division Banyan type architecture is adopted for a superconducting packet switch proto-type. The complete design of the proto-type is performed and the total operation is numerically simulated and confirmed. A 2/spl times/2 switching element which controls the paths of two packets is a key component of the proto-type. The basic switching element with one-bit data width is fabricated and the correct operation is completely confirmed.<<ETX>>

Experiments of the superconducting proximity effect between superconductor and semiconductor

Coherence length in a semiconductor induced by the superconductor proximity effect is obtained experimentally from superconducting transition temperature measurements based on the de Gennes–Werthamer–Hauser theory. It was found that the coherence length in the semiconductor increases with increase in the carrier concentration n as a function of n1/3. This result agreed with the numerical result derived from the Seto–Van Duzer theory.

Influence of short coherence length on the superconducting proximity effect of silicon‐coupled junctions

Superconducting critical currents of NbN‐Si‐NbN and Nb‐Si‐Nb junctions with a coplanar structure are measured as a function of temperature and of the spacing between superconducting electrodes. The current decreases exponentially with increasing temperature above 4.2 K and with increasing spacing. It is found that the coherence length in the semiconductor is determined only by the physical properties of the semiconductor, even though the superconducting electrode with a short coherence length such as NbN is used. Moreover, the measured coherence length in Si agrees with the value derived from the model of Seto and Van Duzer [J. Low Temp. Phys. LT‐13, 323 (1972)].

Fabrication and characterization of Si-coupled superconducting field effect transistors with 0.1 μm gate

A 0.1‐μm‐gate‐length superconducting field effect transistor (FET) with a coplanar structure is realized by a self‐aligned fabrication process using electron beam lithography. A T‐shaped gate structure with an insulated sidewall makes it possible to form the spacing between the superconducting source and drain electrodes to be <0.15 μm without causing an electrical short. The characteristics of this FET measured at 4.2 K indicate that the superconducting current and normal‐state resistance can be successfully controlled by the applied gate bias.