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Dive into the research topics where Toshiyuki Furuta is active.

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Featured researches published by Toshiyuki Furuta.


international symposium on neural networks | 1991

Neural network LSI chip with on-chip learning

Hirotoshi Eguchi; Toshiyuki Furuta; Hiroyuki Horiguchi; Sugitaka Oteki; T. Kitaguchi

A model for neural network learning and recall has been developed and implemented in digital LSI. Activation, weight, and error signals are represented by stochastic digital pulse trains. The average pulse frequency is the value of the signal. All mathematical operations are performed in parallel using simple logical operations on the signal pulses. Learning is performed on the chip. A network of these artificial neural networks rapidly learned the solution to a two-dimensional inverted pendulum-balancer control problem. Another such network solved a simple character recognition problem.<<ETX>>


international symposium on neural networks | 1993

A digital neural network VLSI with on-chip learning using stochastic pulse encoding

Sugitaka Oteki; A. Hashimoto; Toshiyuki Furuta; S. Motomura; T. Watanabe; D.G. Stork; Hirotoshi Eguchi

A digital neural network VLSI chip, RN200 has been developed and fabricated. Sixteen neurons and totally 256 synapses are integrated in a 13.73/spl times/13.73 mm/sup 2/ VLSI chip, fabricated by RICOH 0.8 /spl mu/m CMOS technology. Multiple-layer neural network can be made by combining two or more-chips. Signals within the network (e.g., activations, error signals, connection weights) are represented by stochastic digital pulse trains. Both feed forward and learning processes are efficiently implemented with simple logical gates. Our novel approach for approximating the derivative of activation function is described. The approximation circuit requires only a few gates. Multiple-RNG architecture is adopted to ensure the random distribution of pulses. Both seeds and configurations of the random number generators on the chip can be updated dynamically and randomly by this mechanism. The effectiveness of the derivative and the Multiple-RNG architecture are simulated and verified with the learning performance in a hand-written character recognition problem. The chip can perform 5.12 gigapulse operations per second. It corresponds to effective neural computing rate of 40M CPS or 40M CUPS.


Artificial Life and Robotics | 1997

Hardware-based neural identification: linear dynamical systems

Masanori Sugisaka; Shuuji Motomura; Takashi Kitaguchi; Toshiyuki Furuta; Hirotosi Eguchi

In this paper, a hardware-based neural identification method is proposed in order to learn the characteristics or structure of a discrete linear dynamical system. Quick or instant identification of unknown dynamical systems is particularly required for practical controls not only in intelligent mechatronics such as, for example, automatic selforganized running of mobile vehicles, but in intelligent self-controlled systems. We developed a new method of hardware-based identification for general dynamical systems using a digital neural network very large scale integration (VLSI) chip, RN-200, where sixteen neurons and a total of 256 synapses are integrated in a 13.73×13.73 mm2 VLSI chip, fabricated using RICOH 0.8 μm complementary metal oxide semiconductor CMOS technology (RICOH, Yokohama, Japan). This paper describes how to implement neural ideitification in both learning and feedfoward processing (recognizing) using a RICOH RN-2000 neurocomputer which consists of seven RN-200 digital neural network VLSI chips.


Artificial Life and Robotics | 1998

Neural networks for control in an artificial brain of a recognition and tracking system

Masanori Sugisaka; N. Tonoya; Toshiyuki Furuta

This paper presents a new information-processing machine which is called the artificial brain (ABrain). It also considers the structure of artificial neural networks constructed in a Ricoh neurocomputer RN-2000 in the ABrain to track given trajectories which are produced in a micro-computer or by a light moved by hand in a recognition and tracking system.


utility and cloud computing | 2017

Cloud-based Hint Application of Relevant Meeting Materials Using OCR and ASR Text Information

Jiawei Yong; Katsumi Kanasaki; Ryoh Furutani; Kiyohiko Shinomiya; Toshiyuki Furuta; Shohichi Naitoh

In the meeting being held, sometimes we need to confirm a lot of past relevant meeting materials. However, as the number of meetings has become larger, the retrieval of relevant meeting materials has become much more difficult. Whats more, the retrieval action should not interrupt the meeting process unless on participants own intention. Therefore, during the meeting, an efficient hint method for essential meeting materials without interrupting meeting process is urgently needed. In this paper, we provide a cloud-based application for real-time meeting materials hint in the meeting being held.


Archive | 1998

Pen-shaped handwriting input apparatus using accelerometers and gyroscopes and an associated operational device for determining pen movement

Yasuhiro Sato; Takao Inoue; Etsuko Fujisawa; Takashi Kitaguchi; Toshiyuki Furuta; Norihiko Murata; Mitsuru Shingyouchi


Archive | 1998

Electronic blackboard system

Katsuyuki Omura; Kunikazu Tsuda; Makoto Tanaka; Takashi Kitaguchi; Tomohiko Beppu; Toshiyuki Furuta; Takao Inoue; Takashi Yano


Archive | 2003

Imaging method, imaging apparatus, and image information management system

Shigeaki Nimura; Hitoshi Hattori; Tomohiko Beppu; Nobuyuki Doi; Toshiyuki Furuta; Taiga Asano; Sadao Takahashi; Makoto Yamasaki


Archive | 2003

2-dimensional code pattern, 2-dimensional code pattern supporting medium, 2-dimensional code pattern generating method, and 2-dimensional code reading apparatus and method

Sadao Takahashi; Taiga Asano; Makoto Yamasaki; Tomohiko Beppu; Toshiyuki Furuta; Nobuyuki Doi; Hitoshi Hattori


Archive | 2005

Information recording medium and information processing apparatus

Hitoshi Hattori; Toshiyuki Furuta; Tomohiko Beppu

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