Toufann Chaudhuri

Power Electronic Traction Transformer—Medium Voltage Prototype

Recently, the worlds first ever power electronic traction transformer (PETT) for a 15-kV 16.7-Hz railway grid has been newly developed, commissioned, and installed on the test locomotive, where the PETT is presently in use. The design and development of the PETT are described in two parts of this paper. The details related to the 1.2-MVA medium voltage (MV) PETT prototype, including the electrical design of the power circuit, the sizing and characterization of insulated-gate bipolar transistor (IGBT) devices, the design of the medium-frequency transformer, the cooling system design, insulation coordination, and protection, are presented in this part, while the preceding paper deals with the overall system requirements and control system design based on the low-voltage (LV) PETT prototype. The identical control hardware and software from the LV PETT prototype were used for the MV PETT prototype, thus reducing significantly commissioning time. The experimental results obtained during the testing are presented to demonstrate the performance of the developed MV PETT prototype.

Power Electronic Traction Transformer-Low Voltage Prototype

Recently, a worlds first ever power electronic traction transformer (PETT) for 15 kV, 16 2/3Hz railway grid, has been newly developed, commissioned, and installed on the locomotive, where it is presently in use. This marks an important milestone in the traction world. The design and development of the PETT are described in this paper, where a low-voltage (LV) PETT prototype is presented. It has been designed for the purposes of control hardware and software commissioning, thus serving a role of an analogue simulator. In this paper, emphasis is placed on the overall system requirements, from where control system has been developed, implemented, and successfully commissioned. The development of a 1.2MVA medium-voltage PETT prototype will be reported separately in accompanying paper.

The Common Cross-Connected Stage for the 5L ANPC Medium Voltage Multilevel Inverter

Rising interest in multilevel applications has triggered new research activities. This paper proposes a novel multilevel power electronics building block (PEBB) for the five-level active neutral point clamped (ANPC) multilevel voltage source inverter. The PEBB is composed of six switches in a crossed configuration and one capacitor. It is common to the three phases of a five-level ANPC topology, enabling a large number of levels to be generated. This PEBB is meant to be a reliable upgrade to the 5L topology, increasing output signal quality and reducing the size of the output filter in medium voltage applications. The number of levels generated by the common cross-connected stage (C3S) PEBB and the ANPC depends on the voltage ratios chosen between the phase capacitors of the ANPC and the PEBB capacitor(s). The tradeoff stands between the ability to balance the capacitors, the rated blocking voltage of the devices, and the number of levels produced. Under a given configuration, nine levels can be produced, with the possibility to balance the capacitors up to modulation indexes in the region of m = 0.92. The analysis of the general topology, the description of the nine-level case, and simulation results are first presented. Prototyping results are then shown, and they validate the introduced concept and topology.

Power electronic transformer (PET) converter: Design of a 1.2MW demonstrator for traction applications

A power electronic transformer converter made of cascaded multiple cells with a medium frequency link can replace the bulky traditional transformer in various applications with several advantages, including reduced size and weight, and energy savings. This paper describes the design of a 1.2MW power electronic transformer (PET) demonstrator for traction applications. Several design challenges, i.e. the selection of the IGBT modules, the design of the multiple-functional medium frequency transformer, and the mechanical arrangement to achieve the high voltage insulation between the grid voltage and ground potential, have been discussed. The experimental results, obtained from the developed PET demonstrator, are presented.

Cross-Connected Intermediate Level (CCIL) Voltage Source Inverter

Recently, multilevel applications have known many improvements. Initially introduced to answer the problem of the series-connection of components in medium voltage applications, multilevel topologies have now to serve new purposes. Recent multilevel technologies have the potential to significantly reduce the size of passive filters, thus increasing efficiency and power density. With the more stringent regulations concerning harmonic emissions, more levels are needed to allow filterless operation while keeping a moderate switching frequency. In this context, the new topological family of high density advanced multilevel inverters, called cross-connected intermediate level (CCIL) voltage source inverter, is introduced in this paper and offers a novel solution to generate multiple output levels.

Introducing the Common Cross Connected Stage (C 3 S) for the 5L ANPC multilevel inverter

This paper proposes a novel multilevel power electronics building block (PEBB) for the 5 level ANPC multilevel voltage source inverter [7]. The PEBB is composed of 6 switches in a crossed configuration [8] and one capacitor. It is common to the 3 phases of a 5 level ANPC topology, enabling a large number of levels to be generated, especially uniform voltages steps in 7 and 9 levels configurations. This PEBB is meant to be a reliable upgrade to the 5L topology, increasing output signal quality, and therefore directly contributing in reducing the size of the output filter notably in medium voltage applications. The number of levels generated by the C S PEBB and the ANPC depend on the voltage ratios chosen between the phase capacitors of the ANPC and the PEBB capacitor(s). The trade off stands between ability to balance the capacitors, the rated blocking voltage of the devices and the number of levels produced. Under a given configuration, 9 levels can be produced with the possibility to balance the capacitors up to modulation indexes in the region of m=0.92. The analysis of the general topology, the description of the 9 level case, and simulation results are first presented. Prototyping results are then shown and validate the introduced concept and topology.

Modeling and Control of the Cross-Connected Intermediate-Level Voltage Source Inverter

Multilevel inverter applications have become more and more common. Multilevel topologies have now to serve new purposes, and interest is rising in new application fields. Recent multilevel technologies have the potential to significantly reduce the size of passive filters, thus increasing efficiency and power density. With the more stringent regulations concerning harmonic emissions and reliability concerns, more levels are needed to allow filterless operation while keeping a moderate switching frequency and simple structure. In this context, the new topological family of high-density advanced multilevel inverters, called cross-connected intermediate-level voltage source inverter, is introduced in this paper.