Trevor J. Terrell

Improved coding of transform coefficients in JPEG-like image compression schemes

Abstract This paper describes a new approach to the coding of transform coefficients used in transform-based image compression schemes such as JPEG. Experimental results demonstrate the advantages of this scheme in terms of a significant entropy reduction leading to improved compression. The scheme employs an adaptive zigzag-reordering technique, which operates on rectangular sub-blocks of coefficients. Initially, the sub-block dimensions are determined so as to retain all non-zero coefficients. A subsequent development employs a neural network to selectively discard isolated non-zero coefficients, producing smaller sub-blocks and further improvements in coding efficiency. A hardware implementation of the reordering algorithm is also discussed.

Improved clustering using deterministic annealing with a gradient descent technique

Various techniques exist to solve the non-convex optimization problem of clustering. Recent developments have employed a deterministic annealing approach to solving this problem. In this letter a new approximation clustering algorithm, incorporating a gradient descent technique with deterministic annealing, is described. Results are presented for this new method, and its performance is compared with the K-means algorithm and a previously used deterministic annealing clustering algorithm. The new method is shown to produce more effective and robust clustering.

Practical Implementation Considerations

The numerous worked examples and the case studies contained in this book clearly demonstrate that digital signal processing operations are governed by discrete-time representations of algorithmic processes. For example, we have seen that the characteristic performance of a digital filter is determined by its linear difference equation. The practical implementation of real-time digital signal processing operations is generally achieved using one of two practical options, namely (a) using dedicated hardware, such as an application specific integrated-circuit (ASIC) or a bit-slice processor, or (b) using a programmable integrated-circuit (microprocessor or digital signal processor chip). If the processing operations are not required as real-time implementations, then it is often appropriate to perform the DSP computations using a general-purpose personal computer (PC). For example, a number of proprietary software packages have been produced to enable model definitions and simulation of DSP systems.

Digital Signals and Systems

Digital Signal Processing (DSP) is concerned with the use of programmable digital hardware and software (digital systems) to perform mathematical operations on a sequence of discrete numbers (a digital signal). Such processing is needed to facilitate the extraction of information embedded in the signal.

The Discrete Fourier Transform

As discussed in Section 1.1.2, the design of a DSP system basically involves two fundamental tasks, namely, the analysis of the input signal and the design of a processing system to give the desired output. There are several different mathematical tools for carrying out these two tasks. A time-domain approach was presented in Chapter 1, where a sampled input signal was represented by a weighted unit-impulse train and a DSP system was described by either a general difference equation or a unit-impulse response. A frequency-domain approach based on the z-transform was presented in Chapter 2, where an infinite data sequence was converted to an algebraic equation and a DSP system was described compactly by a transfer function; the former enables the frequency spectrum of a signal to be estimated and the latter enables the stability and the frequency response of a DSP system to be assessed.

Modeling and performance evaluation of a modified Orwell protocol under symmetrical and asymmetrical traffic distributions

With the emergence of Broadband ISDN and the adoption of ATM as its transport mechanism there is a growing interest in slotted ring networks both for high speed packet switching and for multimedia LAN applications. This paper describes a slotted ring testbed which uses a modified Orwell protocol for media access, and which has enabled a study of the modified Orwell protocol under symmetrical and asymmetrical traffic flow distributions. The architecture of the slotted ring testbed is outlined, and analytical models for the protocol are presented for different traffic flow distributions. The analytical results are compared to experimental results obtained from the testbed. The suitability of the reset rate as an indicator of available bandwidth in an access control mechanism is considered, and it is shown that for constant traffic flow and traffic statistics the reset rate works well as an indicator of potential network congestion. Under changing traffic distributions and traffic arrival statistics, additional indicators of congestion are required. On-going work into access control for the test-bed in a integrated services environment is outlined.