Tsai-Chung Yu

Chopper-stabilized sigma-delta modulator

A new architecture of the sigma-dela modulators using a chopper-stabilized configuration is described. It is shown that using this new architecture and without any other circuit techniques, a sigma-delta modulator becomes immune from the contamination of the inherent low-frequency noise, such as offset noise, flicker noise, and clock feedthrough noise. The new architecture can be easily designed from the existing architectures without any stability problems. As an example, a second-order sigma-delta modulator is designed by using the new architecture. The simulation results show excellent immunity from the low-frequency noise.<<ETX>>

New monolithic switched-capacitor differentiators with good noise rejection

Inverting and noninverting switched-capacitor (SC) differentiators suitable for integrated-circuit implementation are proposed and analyzed. Their structures are simple, parasitic-free, and less sensitive to offset voltage and power-supply voltage changes. In addition, their fabrication process and operating clocks are fully compatible with conventional SC integrators. Noise analysis shows a good low-frequency noise-rejection capability. The high-frequency noise can be suppressed and does not overdrive the output of the SC differentiators. To demonstrate the application of the SC differentiators in the SC filter, a bandpass differentiator-type biquad is presented. Both the differentiators and the biquad have been fabricated and measured. The differentiation waveforms and the good consistency between the measured and the simulated circuit responses verify the correct operation of the SC differentiators. >

Realizations of IIR/FIR and N-path filters using a novel switched-capacitor technique

Using novel SC (switched-capacitor) differentiators and the synthetic division technique, discrete-time IIR and FIR (infinite- and finite-impulse-response) transfer functions have been realized by sample-data SC analog circuits. The resulting filter structures are simple, compact, and stray-insensitive. Moreover, they have a low component sensitivity, good low-frequency noise performance, and large enough dynamic range. Theoretical calculation and SWITCAP simulation results on certain types of filters have shown good consistency with the experimental results, which substantiates both the design methodology and the circuit functions. The multiplexing technique can be directly applied to the SC differentiators without modification. Thus the multiplex differentiators can be used to design filter banks, which may save chip area and reduce DC power dissipation. Circuit examples are given, and their functions are successfully verified through chip fabrication and measurement. The multiplexed SC differentiators are modified to form three types of N-path circuits, which can be used to design a narrowband bandpass filter. Because the N-path circuits are based on SC differentiators rather than SC integrators, they have a distinct performance superiority to SC integrator-based N-path circuits. >

Whole-chip ESD protection for CMOS VLSI/ULSI with multiple power pins

An anomalous phenomenon of ESD failure in CMOS ICs with multiple VDD and VSS power-supply pins is discovered and investigated. A method of whole-chip ESD protection to overcome this anomalous ESD failure is proposed with experimental verification.

The design of high-pass and band-pass ladder filters using novel SC differentiators

The design methodology and design equations of switched-capacitor (SC) high-pass and band-pass ladder filters using SC differentiators are presented. It is shown that the design method is straightforward, and the resultant SC ladder filters have a concise and fully stray-insensitive structure with a low component sensitivity. Moreover, they do not have a DC instability problem. In SC ladder filter design, therefore, the proposed differentiator-based methodology can be incorporated with the conventional integrator-based one to design all kinds of ladder filters with satisfactory performances.<<ETX>>

Non-recursive switched-capacitor decimator and interpolator circuits

Non-recursive switched-capacitor decimator and interpolator circuits are developed and analyzed. Their circuit structures are simple and the design procedure is concise and direct. Moreover, they have the advantages of fewer clock phases, low sensitivities to component and power-supply variations, good noise performance, and large dynamic range. Two design examples are presented. The consistency of simulation and theoretical results prove the correctness and usefulness of the proposed circuits.<<ETX>>

An S/H interpolator for oversampling D/A converters

A novel S/H interpolator for oversampling converters is proposed where the filter coefficients are linearly combined to form the symmetric terms. It is verified that the hardware implementation is efficient due to the decreased multiplier rate and compact digital circuits. These lead to a decrease of the coupled noise, so that the performance of the analog front-end circuits in oversampling D/A (digital-to-analog) converters is not degraded. The multiplier rate is only half of that in the polyphase structure, and the number of the delay elements remains the same. Due to the lower multiplier rate, smaller chip size, and smaller transient noise, the proposed new interpolation FIR (finite impulse response) filter is more suitable in the applications of dual-channel audio-band D/A converters.<<ETX>>

New architecture for delta-sigma analog-digital converter

Delta - Sigma analog-digital converters based on SC delay and SC differentiators are proposed and constructed. Novel Delta - Sigma analog-digital converters can also be incorporated with SC integrators to implement Delta - Sigma analog-digital converters with more design flexibility and freedom. Novel SC differentiators and SC delay which do not require a high slew rate op-amp are also described. A design example of a one-bit second-order Delta - Sigma analog-digital converter is given. Good performance of simulation responses confirms the correct operation of the proposed structure.<<ETX>>

Realization of FIR and IIR ftlters using SC differentiators

A new algorithm t o r e a l i z e SC FIR and I I R f i l t e r s i s presented. It uses t h e SC d i f f e r e n t i a t o r and the SC i n v e r t e r as building blocks. Simple Structure and good performance make t h e design q u i t e a t t r a c t i v e i n V L S I s igna l processing.