Tso-Min Chou

Gate-recessed integrated E/D GaN HEMT technology with f T /f max >300 GHz

We report 1000-transistor-level monolithic circuit integration of sub-30-nm gate-recessed E/D GaN high-electron-mobility transistors with <i>fT</i> and <i>f</i>_max above 300 GHz. Simultaneous <i>fT</i>/<i>f</i>_max of 348/340 and 302/301 GHz for E- and D-mode devices, respectively, was measured, representing a 58% increase in <i>fT</i> compared with our previous report, due to improved management of RC parasitic delay. Three-terminal E- and D-mode breakdown voltage of 10.7 and 11.8 V, respectively, is limited by gate-drain breakdown.

Electrical and Thermal Performance of AlGaN/GaN HEMTs on Diamond Substrate for RF Applications

Thermal conductivity of the substrate affects the performance of high power RF devices. It is a dominant limiting factor in current state-of- the-art GaN HEMTs on SiC substrate. Due to high thermal conductivity, diamond substrate is an attractive alternative for GaN HEMTs. We have developed device quality GaN-on-diamond wafers using CVD diamond and fabricated 0.25 μm gate length HEMTs. We present detailed electrical and thermal results of the fabricated devices, which show RF power comparable to standard GaN-on-SiC HEMTs. We demonstrate over 25 % lower channel temperature for these devices compared to GaN-on-SiC devices. Electrical results using DC and RF tests and thermal results using IR thermography and micro-Raman spectroscopy are included.

Temperature assessment of AlGaN/GaN HEMTs: A comparative study by Raman, electrical and IR thermography

The accuracy of different thermography techniques for the determination of AlGaN/GaN HEMT channel temperature was investigated. Micro-Raman thermography, a novel electrical testing method, and IR thermography were applied to measure the temperature in the active region of AlGaN/GaN HEMTs with different device geometries. Due to its accepted accuracy, micro-Raman thermography was performed on different devices in order to validate thermal simulation results. When compared to the validated thermal model, pulsed I-V measurements underestimated channel temperature to some degree, while IR thermography determined unrealistically low device temperatures.

InAlN Barrier Scaled Devices for Very High

We report excellent low-voltage (5 to ~ 10 V drain bias) microwave and millimeter-wave performance of deeply scaled InAn/AlN/GaN devices with field-plate gate of ~ 50-nm length, MBE regrown ohmic contacts, and sub-500-nm S-D spacing on four different wafers. These four wafers include also T-gate (no field-plate) devices with very thin passivation and smaller gate (~ 30 nm), which had (for reference) high fT/fmax of ~270/230 GHz, respectively, both for D- and E-mode devices. Their counterparts with field-plate gates (same gate geometry but with underlying dielectric) and 50-nm gates had lower fT/fmax but excellent performances at 10 GHz with up to 67%-69% power-added efficiency (PAE) at 6 V bias and 30 GHz with up to 14.4 dB associated gain and 2.6 W/mm and 39.6% PAE at 8 V bias. The noise figure of these devices at 10 GHz was ~ 0.25 dB with 3 V drain bias. We have measured the linearity [third-order intercept (TOI)] of 300- μm devices on another wafer with 90-nm field-plate gates: at 5 GHz and 5 V bias the devices had 31-dBm TOI with 0.31 W/mm, 18.5-dB gain, and 27.1% PAE.

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We present GaAs pHEMTs demonstrating output power over 1 W/mm in Ka-band at an operating voltage of 8 V. DC, RF and reliability results are reported. Continuous wave load pull tests at 35 GHz show peak power added efficiency of 52 % and associated gain of 8 dB. The saturated output power of 1.2 W/mm is achieved. Power performance improvement is attributed to a new dielectrically defined 0.15 µm gate process which allows successful operation of these devices at a drain voltage of 8 V. Devices also show excellent small signal performance with maximum cut-off frequency as high as 107 GHz at a drain voltage of 1 V. Using three-temperature accelerated DC life tests, activation energy of 1.45 eV and median life time over 1 million hours at a channel temperature of 150 °C are estimated.

and for Low-Voltage RF Applications

A quick and reliable method to estimate the channel temperature of GaN high electron mobility transistors is extremely important in order to understand the physical degradation mechanisms as well as to extract a meaningful life time of the device. In this work, we present a simple yet powerful method to electrically measure the channel temperature of GaN HEMTs with a synchronized pulsed I-V setup. To validate the technique, we extract thermal resistance a) on the same device, multiple times, b) on multiple identical devices on the same wafer, c) on devices with different geometries and d) on identical devices with different level of degradation.

Development of Ka-Band GaAs pHEMTs with Output Power over 1 W/mm

Thermal assessment of AlGaN/GaN heterostructure on diamond substrate is presented. To emphasize the advantages of diamond substrate for GaN, results of test devices on GaN-on-Diamond material are compared to those on GaN-on-SiC and GaN-on-Si materials. Mesa resistors and High Electron Mobility Transistors (HEMTs) fabricated using a 0.25 μm gate length process are characterized. Infrared thermography is employed for measurement of temperature rise in the test resistors and transistors at different power dissipation conditions. Addition of a simple feature to the conventional mesa resistor is found to allow a non-destructive, on-wafer compatible and more reliable surface temperature determination using IR thermography. DC current-voltage characteristics are included to show the impact of different substrates on the electrical behavior of HEMTs. Our results clearly demonstrate a significant thermal advantage of diamond substrate compared to SiC and Si substrate for GaN HEMTs designed for closely comparable electrical performance. For the same average channel temperature rise in the identical HEMTs, we estimate that GaN-on-Diamond material used in this study allows 1.7X dissipated power of GaN-on-SiC and 3X dissipated power of GaN -on-Si.

Method for Estimation of the Channel Temperature of GaN High Electron Mobility Transistors

Device models to support circuit design efforts using monolithically-integrated enhancement- and depletion-mode high-speed InAlN/AlN/GaN HEMTs are reported. Physically- motivated modifications to the conventional empirical compact models have been included to enhance model accuracy over bias and temperature. The models have been extracted from DC through 110 GHz at baseplate temperatures from 25 °C through 100 °C; good agreement is obtained between measurement results and the extracted model.