Tsung-Ching Huang
Hewlett-Packard
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Publication
Featured researches published by Tsung-Ching Huang.
IEEE Transactions on Electron Devices | 2011
Tsung-Ching Huang; Kenjiro Fukuda; Chun-Ming Lo; Yung-Hui Yeh; Tsuyoshi Sekitani; Takao Someya; Kwang-Ting Cheng
Thin-film transistors (TFTs) are a key element of flexible electronics implemented on low-cost substrates. Most TFT technologies, however, have only monotype-either n- or p-type-devices. In this paper, we propose a novel design style Pseudo-CMOS for flexible electronics that uses only monotype single-VT TFTs but has comparable performance with the complementary-type or dual-VT designs. The manufacturing cost and complexity can therefore be significantly reduced, whereas the circuit yield and reliability are enhanced with built-in postfabrication tunability. Digital cells are fabricated in two different TFT technologies, i.e., p-type self-assembled-monolayer-organic TFTs and n-type metal-oxide InGaZnO TFTs, to validate the proposed Pseudo-CMOS design style. To the best of our knowledge, this is the first design solution that has been experimentally proven to achieve superior performance for both types of TFT technologies.
IEEE Journal of Solid-state Circuits | 2013
Koichi Ishida; Tsung-Ching Huang; Kentaro Honda; Yasuhiro Shinozuka; Hiroshi Fuketa; Tomoyuki Yokota; Ute Zschieschang; Hagen Klauk; Gregory Tortissier; Tsuyoshi Sekitani; Hiroshi Toshiyoshi; Makoto Takamiya; Takao Someya; Takayasu Sakurai
A shoe insole pedometer, which consists of a piezoelectric energy harvester and a 2 V organic pedometer circuit, has been developed as a first step toward the application of flexible large-area energy harvesting. A pseudo-CMOS 14 bit step counter records the number of steps up to 16383 steps using the harvested power. To increase the noise margin of the pseudo-CMOS logic circuits, a negative voltage is generated by an organic charge pump circuit and is applied to the pseudo-CMOS inverters and transmission gates in the flip-flops in the step counter. A pseudo-CMOS Schmitt trigger inverter used to feed clean square pulses to the step counter is presented. This paper describes the details of the insole pedometer and provides measurement results and some discussion.
IEEE Electron Device Letters | 2011
Kenjiro Fukuda; Tsuyoshi Sekitani; Tomoyuki Yokota; Kazunori Kuribara; Tsung-Ching Huang; Takayasu Sakurai; Ute Zschieschang; Hagen Klauk; Masaaki Ikeda; Hirokazu Kuwabara; Tatsuya Yamamoto; Kazuo Takimiya; Kwang-Ting Cheng; Takao Someya
Pseudo-CMOS inverters operating at 2 V and comprising four p-type organic transistors with ultrahigh gain are fabricated using self-assembled monolayer gate dielectrics. The inverter gain is as large as 302 at an operation voltage of 2 V, whereas the minimum operation voltage is as small as 0.5 V. The oscillation frequency of a five-stage ring oscillator comprising pseudo-CMOS inverters is 4.27 kHz at 2 V, corresponding to 23.4 μs of propagation delay per stage. This is the fastest among organic circuits operating at low voltage. Pseudo-CMOS amplifier circuits show a large gain of 240 for a 3.0-mV input voltage.
IEEE\/OSA Journal of Display Technology | 2009
Tsung-Ching Huang; Kwang-Ting Cheng
We propose a self-tunable pseudo-CMOS cell library to address the key challenges of circuit design for flexible electronics. This cell library provides the building blocks for designing complex circuits which are able to operate at a low supply voltage. The circuit reliability is greatly improved by incorporating the post-fabrication tunability into the cells to compensate for the device degradation (e.g., DeltaV TH). Logic gates, such as latches and flip-flops, and larger building blocks, such as shift-registers are, developed to demonstrate the key features and feasibility of this proposed cell library.
Proceedings of the National Academy of Sciences of the United States of America | 2017
Ting Lei; Ming Guan; Jia Liu; Hung-Cheng Lin; Raphael Pfattner; Leo Shaw; Allister F. McGuire; Tsung-Ching Huang; Leilai Shao; Kwang-Ting Cheng; Jeffrey B.-H. Tok; Zhenan Bao
Significance Organic electronics, particularly polymers, can be synthesized and processed with low temperatures and, more importantly, have the potential to be environmentally benign candidates for electronic applications. However, there has been no report of totally decomposable polymer semiconductors. Their availability will enable low-cost and fully disintegrable transient electronics. We have developed an innovative concept based on imine chemistry that allows totally disintegrable and biocompatible semiconducting polymers. Using an ultrathin biodegradable substrate, we successfully fabricated polymer transistors and logic circuits that show high performance and are ultralightweight, but they can be fully disintegrable. Our work significantly advances organic materials to enable environmentally friendly and biointegrated electronic applications. Increasing performance demands and shorter use lifetimes of consumer electronics have resulted in the rapid growth of electronic waste. Currently, consumer electronics are typically made with nondecomposable, nonbiocompatible, and sometimes even toxic materials, leading to serious ecological challenges worldwide. Here, we report an example of totally disintegrable and biocompatible semiconducting polymers for thin-film transistors. The polymer consists of reversible imine bonds and building blocks that can be easily decomposed under mild acidic conditions. In addition, an ultrathin (800-nm) biodegradable cellulose substrate with high chemical and thermal stability is developed. Coupled with iron electrodes, we have successfully fabricated fully disintegrable and biocompatible polymer transistors. Furthermore, disintegrable and biocompatible pseudo-complementary metal–oxide–semiconductor (CMOS) flexible circuits are demonstrated. These flexible circuits are ultrathin (<1 μm) and ultralightweight (∼2 g/m2) with low operating voltage (4 V), yielding potential applications of these disintegrable semiconducting polymers in low-cost, biocompatible, and ultralightweight transient electronics.
design, automation, and test in europe | 2010
Tsung-Ching Huang; Kenjiro Fukuda; Chun-Ming Lo; Yung-Hui Yeh; Tsuyoshi Sekitani; Takao Someya; Kwang-Ting Cheng
Flexible electronics have attracted much attention since they enable promising applications such as low-cost RFID tags and e-paper. Thin-film transistors (TFTs) are considered as an ideal candidate to implement flexible electronics on low-cost substrates. Most TFT technologies, however, have only mono-type - either n- or p-type - devices and thus modern design technologies for silicon-based electronics cannot be directly applied. In this paper, we propose a novel design style Pseudo-CMOS for flexible electronics that uses only mono-type TFTs while achieving comparable performance with the complementary-type designs. The manufacturing cost and complexity can therefore be significantly reduced while the circuit yield and reliability are also enhanced with the built-in capability of post-fabrication tuning. Some standard cells have been designed and fabricated in p-type organic and n-type InGaZnO (IGZO) TFT technologies which successfully verify the superiority of the proposed Pseudo-CMOS design style. To the best of our knowledge, this is the first design solution that has proven superior performance for both types of TFT technologies.
IEEE Journal of Solid-state Circuits | 2012
Koichi Ishida; Tsung-Ching Huang; Kentaro Honda; Tsuyoshi Sekitani; Hiroyoshi Nakajima; Hiroki Maeda; Makoto Takamiya; Takao Someya; Takayasu Sakurai
A 100-V ac energy meter based on the system-on-a-film (SoF) concept, in which various devices are integrated on a flexible film, is presented. The system consists of 20-V organic CMOS digital and analog circuits with a floating gate (FG) for process variation compensation, 100-V organic pMOS rectifiers for generating a 50-Hz clock and 20-V dc power, and an organic LED (OLED) bar indicator. The energy meter based on the SoF is flexible and therefore can be installed to monitor each ac outlet simultaneously. The organic devices are printable, and it is expected that they can be formed using a low-cost printing process in the future. The energy meter can measure the accumulated energy of a 100-Vrms ac lineup to a full-scale value of 360 Wh when a 500-W target load is monitored. The flexible film is foldable and its total area excluding the ac connector is 200 × 200 mm2 in the unfolded form or 70 × 70 mm2 when folded.
international solid-state circuits conference | 2012
Koichi Ishida; Tsung-Ching Huang; Kentaro Honda; Yasuhiro Shinozuka; Hiroshi Fuketa; Tomoyuki Yokota; Ute Zschieschang; Hagen Klauk; Gregory Tortissier; Tsuyoshi Sekitani; Makoto Takamiya; Hiroshi Toshiyoshi; Takao Someya; Takayasu Sakurai
Energy harvesting is an enabling technology for realizing an ambient power supply for wireless sensor nodes and mobile devices. By using flexible photovoltaic cells and piezoelectric films, we can readily harvest ambient energy if flexible energy harvesters can be realized. Conventional silicon circuits, however, are not best suited to realizing flexible large-area energy harvesters because they are not mechanically conformable to uneven surfaces such as shoes. To address this challenge, we propose an organic insole pedometer with a piezoelectric energy harvester in this paper as the first step toward ambient energy harvesting using organic flexible electronics.
IEEE Design & Test of Computers | 2011
Tsung-Ching Huang; Jiun-Lang Huang; Kwang-Ting Cheng
In this review article, the authors survey several thin-film transistor (TFT) technologies for flexible electronics of the future. The reviews focus centers on the reliability issues of these new devices compared to those of classic silicon CMOS. In addition, the article examines different digital and analog design techniques, which are discussed within the context of robust circuit design.
international conference on computer aided design | 2015
Rui Wu; Chin-Hui Chen; Cheng Li; Tsung-Ching Huang; Fan Lan; Chong Zhang; Yun Pan; John E. Bowers; Raymond G. Beausoleil; Kwang-Ting Cheng
Short-reach nanophotonic interconnects are promising to solve the communication bottleneck in data centers and chip-level scenarios. However, the nanophotonic interconnects are sensitive to process and thermal variations, especially for the microring structures, resulting in significant variation of an optical links bit error rate (BER). In this paper, we propose a power-efficient adaptive tuning approach for nanophotonic interconnects to address the variation issues. During the adaptive tuning process, each nanophotonic interconnect is adaptively allocated just enough power to meet the BER requirement. The proposed adaptive tuning approach could reduce the photonic receiver power by 8% - 34% than the worst-case based fixed design while achieving the same BER. Our evaluation results show that the adaptive tuning approach scales well with the process variation, the thermal variation and the number of communication nodes, and can accommodate different types of NoC architectures and lasers.