Tsz Yin Yum

Dual-Mode Dual-Band Bandpass Filter Using Stacked-Loop Structure

In this letter, a dual-mode dual-band bandpass filter using stacked-loop structure is proposed, which allows two transmission paths to radio frequency (RF) signals. Each of them using dual-mode resonators results in respective passband. This can provide convenience to easily change one passband frequency, while another keeps almost the same. Several attenuation poles in the stopband are realized to improve the selectivity of the proposed bandpass filter. The theoretical and measured results are presented and show good agreement

A wideband compact parallel-strip 180/spl deg/ Wilkinson power divider for push-pull circuitries

A Wilkinson power divider with a differential output implemented in parallel-strip-line (PSL) is proposed. Taking full advantages of the PSL technology and a three-stage cascaded design, more than 170% impedance and isolation bandwidths are obtained. Inherent to the PSL structure, the 180deg differential output is frequency-independent. A class-B push-pull power amplifier employing the devised concept is designed, showing a peak efficiency of 44% over a 4-GHz bandwidth. Without exploiting any extra and external low-pass filters, the proposed design can produce startling second-harmonic suppressions (more than 50dB) over the whole working dynamics and operated bandwidth

Novel subharmonically pumped mixer incorporating dual-band stub and in-line SCMRC

A subharmonically pumped (SHP) mixer with very low conversion loss is proposed. The mixer employed the newly developed spiral compact microstrip resonant cell (SCMRC) and compact dual-band stub (DBS). Incorporating the in-line SCMRC and DBS into a second SHP mixer, we can provide proper terminations for the IF, RF, and local-oscillator (LO) signal simultaneously in addition to all major unwanted mixing products, leading to a unique low conversion-loss design. Our SHP mixer with a measured 3.9-dB single-sideband (SSB) down-conversion loss at 11.6-GHz RF signal outperforms typical designs of 8-12 dB, and represents a state-of-the-art performance for a planar X-band harmonic mixer. With a broad-band operation, our mixer shows an SSB down-conversion loss of less than 8.2 dB from 9 to 12.8 GHz. Moreover, the measured LO-RF isolation is better than 45 dB for LO frequency ranges of 4-5.8 GHz. Large-signal two-tone measurements reveal an excellent linear response of the working prototype, showing 7.5 dBm and 52 dB for the 1- dB power compression point and spurious-free dynamic range, respectively.

Amplifier linearization using compact microstrip resonant cell-theory and experiment

This paper presents a novel technique for reducing the intermodulation distortions (IMDs) in power amplifiers. In this method, both second- and third-harmonic components generated by the transistor are reflected back simultaneously by the compact microstrip resonant cell (CMRC) at the input port with proper phases to mix with the fundamental signal for the reduction of IMDs. A rigorous mathematical analysis on the effectiveness of multiharmonic reflections has been formulated and derived using the Volterra series. Moreover, the delay mismatch factor of the proposed method is analytically studied and the result shows that a better tolerance to the delay error can be achieved by using CMRC circuitry. Standard two-tone test measurements reveal 32- and 22-dB reductions for the third-order IMD and fifth-order IMD, respectively, without affecting the fundamental signal at 2.45 GHz. Meanwhile, the proposed approach gives a peak power added efficiency of 53% with 11.5 dB transducer gain and 15 dBm output power for a single-stage SiGe bipolar junction transistor. The adjacent channel power ratio (ACPR) is -55dBc for a data rate of 384-kb/s quadrature phase shift keyed modulated signal with 2-MHz spanning bandwidth, and this ACPR is maintained for a broad range of output power level.

High-efficiency linear RF Amplifier - a unified circuit approach to achieving compactness and low distortion

The realization of a highly efficient linearized amplifier has emerged as a paramount issue in the design of advanced mobile handsets. In this paper, a new RF amplifier linearization scheme using a compensating transistor combination is proposed. The devised approach ably utilizes all terminals of an additional transistor that offers a unified pre-post-distortion and cubic distortion characteristic for performance improvement. Meticulous modeling along with a power-dependent Volterra series is performed to identify contributions on each mechanism under various power levels. An experimental four-tone test reveals a maximum 28-dB reduction for the intermodulation distortion at 1.95 GHz, which outperforms typical pre-distortions of 5-10 dB. A single-ended two-stage amplifier module demonstrates a state-of-the-art power efficiency of 55% with 27-dB transducer gain at 24-dBm output power. Meanwhile, the adjacent channel power ratio (ACPR 1) is maintained with good margins of -35dBc for a four-channel wideband code-division multiple-access signal under all output dynamics. Graceful degradations on modulation bandwidths, tone spacing, bias, and gain variations are also discussed, showing superb performance with virtually no dedicated retuning circuit parameters for multicarrier applications. By combining a bias control along with the proposed linearization technique, the average efficiency (12%) is 3times higher than that of the fixed bias (3.94%), demonstrating the potential utility on further prolonging battery lifetime in practical scenarios

A novel amplifier linearization technique using an anti-parallel reconfigurable transistor (ART) pair

A new amplifier linearization methodology using an anti-parallel reconfigurable transistor (ART) pair is proposed. Unlike conventional linearization methods in which only one technique is employed, our ART method utilizes all terminals of an additional transistor and provides a unified pre-, post- and cubic-polynomial distortion technique for performance enhancement. Experimental results reveal a 42 dB reduction for the third-order intermodulation distortion (IMD3) and 15 dB for the fifth-order (IMD5) at 2.1 GHz operation band. The input 1-dB gain compression point and phase distortion have been improved effectively up to 8 dB and 15/spl deg/, respectively, under a 5-V operation voltage. Meanwhile, the proposed approach demonstrates a peak power added efficiency (PAE) of 61% with 16 dB transducer gain and 21 dBm output power for a single stage low-power SiGe BJT transistor. The adjacent channel power ratio (ACPR) is maintained over -45 and -60 dBc for a W-CDMA and PHS modulated signal, respectively, under a wide range of output power.

The folded hybrid ring and its applications in balance devices

In this paper, a novel folded hybrid ring and its applications have been presented. The hybrid ring are folded for size reduction in the multilayered printed circuit media and employed as the transition between the microstrip line (MSL) and the parallel-strip line (PSL) for balanced circuit applications. The PSL has inherently advantages of easy realization of balanced configuration which is suitable for push-pull designs, especially for high power applications. The PSL makes the design of circuits more flexible than MSL because the lump components and solid state devices can be easily mounted in both series and shunt manners without any difficulties in fabrication.

Novel sub-harmonically pumped mixers incorporating dual-band quarter-wave and in-line stub

Sub-harmonically pumped (SHP) mixers with very low conversion loss are developed. These mixers entail the use of novel dual-band quarter-wave stubs and in-line stub simultaneously providing return paths for the IF, LO and RF frequencies and terminating unwanted frequency mixing products. These stubs are realized in the form of compact microstrip resonant cells with spiral patterns. The measured 4.1 dB conversion loss at 11.8 GHz RF signal of our new 2/sup nd/ SHP mixer outperforms typical designs of 8-10 dB. The 8/sup th/ SHP mixer designed at 44 GHz RF signal achieves a simulated minimum conversion loss of 9.5 dB. These novel designs provide viable solutions to low-cost high-performance wireless communications subsystems.

A High-Performed Sub-Harmonic Self-Oscillating Mixer for Modern Wireless Communication System

A high-performance X-band sub-harmonic self- oscillating mixer (SOM) is proposed. By using a re-configurable transistor pair in conjunction with an open and a short circuit stubs, the proposed SOM is capable of down converting four RF frequency bands with center frequencies at 7.35, 8.65, 11.35 and 12.65 GHz with a conversion gain ranging from 7.83 to 18.7 dB with very high power-added-efficiency. The measured phase noise of the free-running oscillation is -85.4 dBc/Hz at an offset frequency of 100-kHz. With injection locking, the phase noise is reduced to less than -100dBc/Hz at 10-kHz, without affecting the conversion gains. This is the first demonstration of a multi-band sub-harmonic SOM.

Linearization of mixers using a reconfigurable transistor pair for W-CDMA mobile terminals

We present results in the development of a miniaturized mixer linearization technique for advanced mobile terminals. With the exploitation of a unified RF distortion-compensating mechanism in a dual-transistor framework, the devised approach features simple, yet compact designs that offer a maximum 40-dB improvement on third-order inter-modulation distortions (IMD3). The hybrid circuit using a low-power device produced a +7-dBm output power at the 1-dB gain compression (Pl-dB), sustaining as many as +26.5 dBm third-order intercept point (OIP3) under a 2-V operation voltage. Graceful degradations on modulation bandwidths and gain variations are also presented, showing superb performance.