Ui-Seok Hong

K-band hair-pin resonator oscillators

K-band hair-pin resonator oscillators using a frequency doubler and the push-push method are presented in this paper. An HP EEsof Libra ver. 6.1 has been used for the nonlinear design of the oscillators. For the oscillators using the frequency doubler and the push-push method, the output power of 0.83 dBm and -1.67 dBm, and phase noise of -86 dBc/Hz and -90 dBc/Hz at the offset frequency of 100 kHz are obtained, respectively.

W-CDMA High Power Amplifier using Anti-Phase Intermodulation Distortion Linearization Technology

This paper shows how the ACLR of power amplifier can be reduced by using Anti-phase IMD linearization technique which generate Anti-phase IMD in the driver stage compare to output stages IMD. Brief theory and design process are proposed. From the experimental result of 4-carriers W-CDMA input signal, this amplifier has ACLR -55 dBc@5 MHz offset at 44.7 dBm(30 watts) average output power. Compare to optimum matching technique to get maximum power gain, this technique has been improved ACLR by 12 dBc.

The design of power amplifier for 5.8 GHz wireless LAN application using GaAs substrate

This paper describes a compact two-stage hybrid power amplifier for 5.8 GHz-band Wireless Local Area Network (WLAN) applications. The amplifier has been fabricated on high dielectric semiconductor wafer, and then the amplifier has small dimension compared with the conventional hybrid circuits. To fabricate the amplifier, the mask pattern is produced using electron beam lithography. Then the FET, capacitors and resistors are combined with the microstrip line pattern by silver epoxy. The size of the two-stage amplifier is measured to be 2.1 cm/spl times/1.4 cm.

Miniaturized microstrip antenna for a repeater system in a mobile communication cellular band

A simple technique to reduce the overall dimension of a microstrip antenna with a partially filled dielectric substrate is proposed. The miniaturized microstrip antenna for a repeater system in a mobile communication cellular band (824 MHz-894MHz) is designed with the proposed technique, and commercialized with low cost, light weight, and small size. The proposed method will be more attractive for a light-weight, small-size, and low-cost microstrip array.

A passive frequency tripler using the new small-size bandpass filter with low insertion loss

In this paper, a passive frequency tripler using APDP (anti-parallel diode pair) in which a new structure of bandpass filter (BPF) with low insertion loss and small size is presented. The tripler using the new small-size BPF is measured and compared with one using a conventional coupled line BPF. This BPF shows the insertion loss of less than 0.7 dB within the bandwidth of 16.41~19.23 GHz. The conversion loss of the tripler is about 16.6 ~18.5 dB with flatness of less than plusmn1 dB at the fundamental frequency of 5.72 ~ 6.28 GHz. The suppression characteristics for the 1st and 5th harmonic signals at 6.1 GHz are -32.16 dBc and -44.6 dBc, respectively, and its phase noise attenuation is about 9.5 dB at 100 kHz offset.

Effective structure of a push-push oscillator using a hair-pin resonator for K-band application

In this paper, a K-band push-push oscillator is designed and implemented with the form of series feedback, which has good coupling efficiency and oscillation frequency stability. The oscillator shows the output power of 1.17 dBm, the fundamental frequency suppression of 24.17 dBc at 18.37 GHz, and the phase noise of -100 dBc/Hz at offset frequency of 100 kHz.

A Design of New Digital Adaptive Predistortion Linearizer Algorithm Based on DFP(Davidon-Fletcher-Powell) Method

In this paper, a new linearization algorithm for DPD(Digital PreDistorter) is suggested. This new algorithm uses DFP(Davidon-Fletcher-Powell) method. This algorithm is more accurate than that of the existing algorithms, and this method renew the best-fit value in every routine with out setting the initial value of step-size. In modeling power amplifier, the memory polynomial model which can model the memory effect of the power amplifier is used. And the overall structure of linearizer is based on an indirect learning architecture. In order to verify for performance of proposed algorithm, we compared with LMS(Least Mean-Squares), RLS(Recursive Least squares) algorithm.

W-CDMA 30 Watts High Power Amplifier Using Anti-Phase Intermodulation Distortion Linearization Technology

This paper shows how the ACLR of power amplifier can be reduced by using Anti-phase IMD linearization technique which generate anti-phase IMD in the driver stage compare to output stage`s IMD. And design process proposed. From the experimental result of W-CDMA 4FA input signal, this amplifier has ACLR -55 dBc@5 MHz offset at 30 watts average power. Compare to optimum matching technique to get maximum power gain, this technique has been improved ACLR by 12 dBc. Also this amplifier meets 50 watts average output power amplifier specification in domestic market.

Design of Push-Push Oscillator Improving Coupling Characteristics of Resonators

This paper introduces a new type push-push harmonic dielectric resonator oscillator. Proposed oscillators are utilized by HDRO(Harmonic Dielectric Resonator Oscillator) which are combined in push-push structure. As a result, fundamental signal suppression ratio and output power of harmonic signal has been improved. The increase of phase noise is compensated by improving coupling characteristic between resonator and parallel microstrip line. The proposed push-push HDRO shows the output power of 9.32 dBm, the fundamental signal suppression of -47.2 dBc and phase noise of -99.86 dBc at 100 kHz offset frequency and 18.7 GHz center frequency.