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Featured researches published by Urs Kanus.


siggraph eurographics conference on graphics hardware | 2002

VIZARD II: a reconfigurable interactive volume rendering system

Michael Meißner; Urs Kanus; Gregor Wetekam; Johannes Hirche; Alexander Ehlert; Wolfgang Straßer; Michael C. Doggett; P. Forthmann; R. Proksa

This paper presents a reconfigurable, hardware accelerated, volume rendering system for high quality perspective ray casting. The volume rendering accelerator performs ray casting by calculating the path of the ray through the volume using a programmable Xilinx Virtex FPGA which provides fast design changes and low cost development. Volume datasets are stored on the card in low profile DIMMs with standard connectors allowing both, large datasets up to 1 GByte with 32 bit per voxel, and easy upgrades to larger memory capacities. Per-sample Phong shading and post-classification is performed in hardware, giving immediate feedback to changes in the visualization of a dataset. Adding new features, such as pre-integrated classification, can be accomplished using the existing card without expensive and time consuming redesigns. The card can also be used for medical image reconstruction by reconfiguring the FPGA broadening its usefulness for end users. For the first time, users are able to generate high quality perspective images as required for applications such as virtual endoscopy and colonoscopy, and stereoscopic image generation.


siggraph eurographics conference on graphics hardware | 2005

A hardware architecture for multi-resolution volume rendering

Gregor Wetekam; Dirk Staneker; Urs Kanus; Michael Wand

In this paper we propose a hardware accelerated ray-casting architecture for multi-resolution volumetric datasets. The architecture is targeted at rendering very large datasets with limited voxel memory resources for both cases where the working set of a frame does or does not fit into the voxel memory. We describe the multi-resolution model used to organize the volume data, especially the wavelet based compression scheme. An efficient hardware implementation of the wavelet decompression is presented and the considerations for volume memory management are discussed. By incorporating the wavelet decompression in hardware a multiple of the decompression bandwidth compared to a PC can be achieved We also show that the impact of our multi-resolution scheme on the actual ray-casting pipeline is minimal.


international conference on computer graphics and interactive techniques | 1999

A low-cost memory architecture for PCI-based interactive ray casting

Michael C. Doggett; Michael Meißner; Urs Kanus

In this paper we present a low-cost memory architecture running at 100 MHz which is suited for any PCI-based volume rendering accelerator using the ray-casting approach. Current SDRAM technology, parallel access to all voxels required for trilinear interpolation, a cubic addressing scheme, and a buffering mechanism accommodating memory latency are applied to achieve high frame-rates. A total of four off-the-shelf standard DIMM modules are required enabling up to 9 Hz (averaged over a representative set of views) for datasets of 256 voxels, using early ray termination as the only algorithmic optimization. The presented memory architecture is a good balance of cost versus feasibility on a standard PCI card accepting data replication and will be used for the VIZARD II ray casting accelerator. CR Categories: B.3.2 [Memory Structures]: Design Style, Associative and Cache Memories; I.3.1 [Computer Graphics]: Hardware Architecture, Graphics Processors; I.3.3 [Computer Graphics]: Picture/Image Generation, Display Algorithms


Computers & Graphics | 1997

Implementations of Cube-4 on the Teramac custom computing machine

Urs Kanus; Michael Meißner; Wolfgang Straßer; Hanspeter Pfister; Arie E. Kaufman; Rick Amerson; Richard J. Carter; W. Bruce Culbertson; Philip J. Kuekes; Greg Snider

Abstract We present two implementations of the Cube-4 volume rendering architecture, developed at SUNY Stony Brook, on the Teramac custom computing machine. Cube-4 uses a slice-parallel ray-casting algorithm that allows for a parallel and pipelined implementation of ray-casting. Tri-linear interpolation, surface normal estimation from interpolated samples, shading, classification, and compositing are part of the rendering pipeline. Using the partitioning schemes introduced in this paper, Cube-4 is capable of rendering in real-time large datasets (e.g., 10243) with a limited number of rendering pipelines. Teramac is a hardware simulator developed at Hewlett-Packard Research Laboratories. Teramac belongs to the new class of custom computing machines, which combine the speed of special-purpose hardware with the flexibility of general-purpose computers. Using Teramac as a development tool, we implemented two working Cube-4 prototypes capable of rendering 1283 datasets in 0.65 s at a very low 0.96 MHz processing frequency. The results from these implementations indicate scalable performance with the number of rendering pipelines and real-time frame-rates for high-resolution datasets.


siggraph eurographics conference on graphics hardware | 2003

VoxelCache: a cache-based memory architecture for volume graphics

Urs Kanus; Gregor Wetekam; Johannes Hirche

This paper presents a cache-based memory architecture for volume graphics. We describe the memory organization and cache logic to implement a voxel cache based on 43 voxel blocks. We show an efficient prefetching scheme that increases the cache hit ratio to more than 98% in most cases. The performance of the memory system with different types of external memory is demonstrated by a cycle accurate C++ simulation. The VoxelCache memory architecture is designed to be easily adapted to different memory technologies, because all volume graphics specific parts of the memory system are encapsulated inside the on-chip cache. The design is targeted at implementation on off-the-shelf reconfigurable hardware.


field programmable logic and applications | 2002

VIZARD II: An FPGA-based Interactive Volume Rendering System

Urs Kanus; Gregor Wetekam; Johannes Hirche; Michael Meißner

In this paper we present a volume rendering system that implements a Direct Volume Rendering algorithm on a Xilinx FPGA being capable of visualizing 3D-datasets with highest image quality at interactive frame rate. The volume renderer utilizes a cache optimized memory scheme for maximum memory bandwidth and a fully pipelined architecture of the computational expensive rendering calculations. The used ray-casting algorithm was adapted in critical parts to fit the specific need of an efficient hardware usage, with respect to available resources and computational power, without limiting rendering features.Using a FPGA approach offers full flexibility to the implementation of the algorithm making it easy to adapt and extend new features to the rendering pipeline without the need of time consuming redesigns, especially important in a scientific environment.


eurographics conference on graphics hardware | 1996

Cube-4 implementations on the teramac custom computing machine

Urs Kanus; Michael Meißner; Wolfgang Straßer; Hanspeter Pfister; Arie E. Kaufman; Rick Amerson; Richard J. Carter; W. Bruce Culbertson; Philip J. Kuekes; Greg Snider

We present two implementations of the Cube-4 volume rendering architecture on the Teramac custom computing machine. Cube-4 uses a sliceparallel ray-casting algorithm that allows for a parallel and pipelined implementation of ray-casting with tri-linear interpolation and surface normal estimation from interpolated samples. Shading, classification and compositing are part of rendering pipeline. With the partitioning schemes introduced in this paper, Cube-4 is capable of rendering large datasets with a limited number of pipelines. The Teramac hardware simulator at the Hewlett-Packard research laboratories, Palo Alto, CA, on which Cube-4 was implemented, belongs to the new class of custom computing machines. Teramac combines the speed of special-purpose hardware with the flexibility of general-purpose computers. With Teramac as a development tool we were able to implement in just five weeks working Cube-4 prototypes, capable of rendering for example datasets of 1283 voxels in 0.65 seconds at 0.96 MHz processing frequency. The performance results from these implementations indicate real-time performance for high-resolution data-sets.


Archive | 1999

Method and apparatus for illuminating volume data in a rendering pipeline

James M. Knittel; Jan C. Hardenbergh; Hanspeter Pfister; Urs Kanus; Drew R. Martin; Frederic H. Mokren


Archive | 2000

Method and apparatus for mapping reflectance while illuminating volume data in a rendering pipeline

James M. Knittel; Drew R. Martin; Hanspeter Pfister; Urs Kanus


Archive | 2000

Method and apparatus for applying modulated lighting to volume data in a rendering pipeline

James M. Knittel; Jan C. Hardenbergh; Hanspeter Pfister; Urs Kanus; Drew R. Martin; Frederic H. Mokren

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