Urvashi Singh

Low-voltage FGMOS squarer/divider-based analog building blocks

This paper presents a new low-voltage floating gate MOS (FGMOS)-based current-mode squarer/divider circuit. The low-voltage operation is obtained by replacing the PMOS transistor used to bias the conventional circuit with two-input FGMOS. The proposed circuit offers advantage of two-quadrant operation, low supply voltage (0.85 V) requirement, low circuit complexity and low noise as compared to the conventional one. The proposed circuit is then used as basic building block to develop full Gaussian function generator and RMS-to-DC converter. The simulations are performed in TSMC 0.18 µm CMOS, BSIM3 and Level 49 technology by using Spectre simulator of Cadence.

Low-voltage low-power FGMOS based VDIBA and its application as universal filter

This paper presents Floating gate MOS (FGMOS) based low-voltage low-power variant of recently proposed active element namely Voltage Differencing Inverting Buffered Amplifier (VDIBA). The proposed configuration operates at lower supply voltage ?0.75V with the total quiescent power consumption of 1.5mW at the biasing current of 100?A. Further the operating frequency of the proposed VDIBA is improved by using the resistive compensation method of bandwidth extension in Operational Transconductance Amplifier (OTA) stage of the block. By using resistive compensation method of bandwidth extension, the bandwidth of OTA stage increases from 92.47MHz to 220.67MHz. As an application, proposed FGMOS based VDIBA has been used to realize a novel resistorless voltage mode (VM) universal filter. The proposed universal filter configuration is capable of realizing all the standard filter functions in both inverting and non-inverting forms simultaneously without any matching constraint. Other important features include independently tunable filter parameters, cascadibility and low sensitivity figure. The proposed filter is tunable over the frequency range of 4.1MHz to 12.9MHz and is capable of compensating for process, voltage and temperature (PVT) variation. The simulations are performed using SPICE and TSMC 0.18?m CMOS technology parameters with?0.75V supply voltage to validate the effectiveness of the proposed circuit.

Low Voltage Floating Gate MOS Transistor Based Differential Voltage Squarer

This paper presents novel floating gate MOSFET (FGMOS) based differential voltage squarer using FGMOS characteristics in saturation region. The proposed squarer is constructed by a simple FGMOS based squarer and linear differential voltage attenuator. The squarer part of the proposed circuit uses one of the inputs of two-input FGMOS transistor for threshold voltage cancellation so as to implement a perfect squarer function, and the differential voltage attenuator part acts as input stage so as to generate the differential signals. The proposed circuit provides a current output proportional to the square of the difference of two input voltages. The second order effect caused by parasitic capacitance and mobility degradation is discussed. The circuit has advantages such as low supply voltage, low power consumption, and low transistor count. Performance of the circuit is verified at ±0.75 V in TSMC 0.18 μm CMOS, BSIM3, and Level 49 technology by using Cadence Spectre simulator.

High frequency flipped voltage follower with improved performance and its application

In this paper a wideband flipped voltage follower (FVF) with low output impedance at high frequency has been proposed. Inductive-peaking-based bandwidth extension technique is employed in the FVF cell. The small signal high-frequency analysis of both conventional and proposed FVF has been done. It is shown in analytical derivation of the proposed FVF that by adding an inductive element in the feedback path, the bandwidth is enhanced. Simulation results show that bandwidth extension ratio (BWER) of proposed FVF is about 2.00, without extra dc power dissipation. A wideband low voltage current mirror has been developed by using proposed FVF in place of conventional FVF and by doing so, BWER of 2.98 has been achieved. The performances of circuits are verified in TSMC 0.18µm CMOS, BSIM3 and Level 49 technology with 1.5V power supply and by using Spectre simulator of Cadence.

Analog circuits for Gaussian function with improved performance

In this paper two new versions of analog circuits with improved performance are introduced to implement Gaussian Function. They are characterized by low power dissipation, lower mismatching problem, higher tuning ability and larger bandwidth. The FGMOS based Gaussian circuit is designed by replacing the MOSFETs in the conventional CMOS circuit, which are used as variable resistors. Another version of the proposed circuit utilizes the advantage of a resistor to increase the bandwidth of the conventional circuit. The circuits are simulated in TSMC 0.25um CMOS technology using 3.3V supply on SPICE. The bandwidth of resistively compensated Gaussian circuit is about 278MHz and the power dissipation is reduced upto four times by using FGMOS based Gaussian circuit. The proposed circuits for Gaussian function have wide area of application in neural algorithms and chip fabrication.

A Wideband Super Source Follower with Improved Performance and Its Application

Abstract This paper presents a new low-power super source follower (SSF) cell with large output voltage swing and better signal performance. The performance improvement is obtained by replacing one of MOS transistors by two-input floating gate MOS transistor. The bandwidth of the proposed circuit is enhanced by using a resistor in the feedback path of SSF. The basic operating principles of proposed SSF structures are discussed and their lower 3-dB frequency has been derived. An output stage is designed by using proposed SSF structures to verify the performance improvement. The simulations are performed in TSMC 0.18 um CMOS, BSIM3 and Level 49 technology by using Spectre simulator of Cadence.

Low voltage high performance FGMOS based Wilson current mirror

This paper presents floating gate MOS (FGMOS) based Wilson current mirror (WCM) with both low input and output voltage requirements, along with high output impedance. The bandwidth of the proposed FGMOS based WCM is 257.904 MHz and it is further increased to 316.228 MHz by using resistive compensation technique of bandwidth extension. From low-frequency small signal analysis it has been shown that the output impedance of the proposed current mirror is higher than that of conventional one. A low voltage current mode full wave rectifier (FWR) is designed by using proposed FGMOS based WCM. The simulations are performed using SPICE and TSMC 0.18 μm CMOS technology parameters with ± 0.75 V supply voltage to validate the effectiveness of the proposed circuit.

Fully Programmable Gaussian Function Generator Using Floating Gate MOS Transistor

Floating gate MOS (FGMOS) based fully programmable Gaussian function generator is presented. The circuit combines the tunable property of FGMOS transistor, exponential characteristics of MOS transistor in weak inversion, and its square law characteristic in strong inversion region to implement the function. Two-quadrant current mode squarer is the core subcircuit of Gaussian function generator that helps to implement full Gaussian function for positive as well as negative input current. FGMOS implementation of the circuit reduces the current mismatching error and increases the tunability of the circuit. The performance of circuit is verified at 1.8 V in TSMC 0.18 μm CMOS, BSIM3, and Level 49 technology by using Cadence Spectre simulator.

A new wideband regulated cascode amplifier with improved performance and its application

This paper presents a new high frequency Regulated Cascode (RGC) amplifier with improved performance. The split-length compensation technique is used to increase both the bandwidth and output impedance, and decrease the input impedance of the conventional RGC. The bandwidth of the proposed RGC amplifier is 5.81GHz, which is about 2.7GHz larger than that of simple one. The improved performance of the introduced circuit is achieved with no additional passive element and DC power dissipation. In the paper, output impedance and bandwidth of the proposed circuit are derived by using small signal analysis and have also been compared with the traditional one. In addition, a wideband high performance current mirror is designed in the work as an application of the proposed RGC structure. The bandwidth extension ratio (BWER) of the modified wideband current mirror is 1.37. The proposed circuits are designed by using TSMC 0.18?m CMOS process and BSIM3 Level 49 device model. The circuits are simulated on Spectre simulator of Cadence to validate the analytical results obtained in the paper.

Low-voltage low-power high performance current mode fullwave rectifier

This paper presents a low-voltage low-power current mode full wave rectifier. The proposed configuration operates at maximum supply voltage of 0.75V with quiescent power consumption of 2.1W, and has current range of 100A. The output resistance and bandwidth of the designed rectifier are 0.89M and 85.85MHz, respectively. Moreover, the operating frequency of the proposed rectifier is improved from 85MHz to 153.2MHz, by using the resistive compensation method of bandwidth extension. The proposed circuit is designed by using TSMC 0.18m CMOS process and BSIM3 Level 49 device model at0.75V. The circuits are simulated on Spectre simulator of Cadence to validate the analytical results obtained in the paper.